H10W72/5445

Bottom package exposed die MEMS pressure sensor integrated circuit package design

A MEMS pressure sensor packaged with a molding compound. The MEMS pressure sensor features a lead frame, a MEMS semiconductor die, a second semiconductor die, multiple pluralities of bonding wires, and a molding compound. The MEMS semiconductor die has an internal chamber, a sensing component, and apertures. The MEMS semiconductor die and the apertures are exposed to an ambient atmosphere. A method is desired to form a MEMS pressure sensor package that reduces defects caused by mold flashing and die cracking. Fabrication of the MEMS pressure sensor package comprises placing a lead frame on a lead frame tape; placing a MEMS semiconductor die adjacent to the lead frame and on the lead frame tape with the apertures facing the tape and being sealed thereby; attaching a second semiconductor die to the MEMS semiconductor die; attaching pluralities of bonding wires to form electrical connections between the MEMS semiconductor die, the second semiconductor die, and the lead frame; and forming a molding compound.

Light emitting display apparatus
12543375 · 2026-02-03 · ·

A light emitting display apparatus includes a first substrate including pixels and signal lines arranged in a first direction and a second substrate disposed on a rear surface of the first substrate, wherein a routing portion including routing lines is provided in a first lateral surface of the first substrate and a second lateral surface of the second substrate. In the first substrate, a first pad portion adjacent to the first lateral surface includes first pads connected to the signal lines and the routing lines, a first secondary pad provided between the first pads, and a first connection line provided to overlap the first pads and the first secondary pad. In the second substrate, a second pad portion adjacent to the second lateral surface includes second pads connected to the routing lines, a second secondary pad provided between the second pads, and a second connection line provided to overlap the second pads and the second secondary pad. The routing portion includes a secondary routing line connecting the first secondary pad to the second secondary pad.

Semiconductor apparatus
12489090 · 2025-12-02 · ·

A semiconductor device includes semiconductor elements. Each semiconductor element, including first, second and third electrodes, is controlled to turn on and off current flow between the first electrode and the second electrode by drive signals inputted to the third electrode. The first electrodes of the semiconductor elements are electrically connected mutually, and the second electrodes of the semiconductor elements are electrically connected mutually. The semiconductor device further includes a control terminal receiving the drive signals, a first wiring section connected to the control terminal, a second wiring section, and third wiring sections, and further a first connecting member electrically connecting the first and the second wiring sections, a second connecting member electrically connecting the second wiring section and each third wiring section, and third connecting members connecting the third wiring sections and the third electrodes of the semiconductor elements.

Insulation module and gate driver
12581992 · 2026-03-17 · ·

This insulation module is provided with: a first conductor and a second conductor, which are buried in an insulating layer so as to face each other at a distance in the thickness direction of the insulating layer; a first electrode which is connected to the first conductor; a second electrode which is connected to the second conductor, while being arranged at a position that is away from the first electrode when viewed from the thickness direction of the insulating layer; a passivation layer which is formed on the surface of the insulating layer; a low dielectric constant layer which is formed on the surface of the passivation layer, and has a lower dielectric constant than the passivation layer; and a mold resin which covers the low dielectric constant layer.

Isolator

According to one embodiment, an isolator includes: an isolator module including a first coil and a second coil that are separated with respect to a first direction and face each other; a magnetic member provided on the isolator module in such a manner that the magnetic member overlaps the first coil and the second coil when viewed in the first direction; and an insulating member covering the isolator module and the magnetic member.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
20260082999 · 2026-03-19 ·

The disclosure describes a semiconductor device and a method for fabricating a semiconductor device. The semiconductor device includes: a first module and a second module stacked vertically on the first module, each module includes multiple dies stacked vertically within an insulation layer, wherein each die higher than a lower die is laterally offset from the lower die forming a terraced structure, wherein the second module comprises vertical wires connecting the overhang portions of the terraced structure of the second module to a top dielectric layer of the first module underneath the second module, and the insulation layer of the first module further includes through-insulation vias (TIVs) connecting the top dielectric layer to a bottom dielectric layer through the insulation layer, such that the dies of the second module are coupled to the bottom dielectric layer of the first module through the top dielectric layer and TIVs.

Semiconductor device

A semiconductor device includes: an insulating substrate including a circuit pattern; a semiconductor chip mounted on the insulating substrate and connected to the circuit pattern; and an overcurrent interruption mechanism constituted with a same material as material of the circuit pattern, connected to the circuit pattern in series, wherein when an overcurrent flows, the overcurrent interruption mechanism melts and is cut.

Dielectric interposer with electrical-connection cut-in

Implementations described herein relate to various semiconductor device assemblies. In some implementations, a semiconductor device assembly may include a base layer, a dielectric interposer coupled to the base layer and including a first outer surface facing the base layer and an opposing second outer surface facing away from the base layer and spaced apart from the first outer surface in a direction, a first electrical-connection cut-in in the second outer surface that extends, in the direction, toward the first outer surface, and one or more first electrical connections disposed within the first electrical-connection cut-in such that at least a portion of the one or more first electrical connections does not extend, in the direction, beyond the second outer surface.

Multi-tool and multi-directional package singulation

In some examples, a method for manufacturing a semiconductor package comprises coupling first and second semiconductor dies to a metal frame; covering the first and second semiconductor dies and the metal frame with a mold compound; coupling first and second passive components to the first and second semiconductor dies, the first and second passive components on an external surface of the mold compound; sawing through a portion of the metal frame from a first direction to form a first vertical surface of the metal frame, the first vertical surface having a first roughness due to the sawing; and laser cutting through the mold compound and a remainder of the metal frame from a second direction opposing the first direction to form a second vertical surface on the metal frame and a third vertical surface on the mold compound, the second vertical surface having a second roughness due to the laser cutting and the third vertical surface having a third roughness due to the laser cutting.

Semiconductor device and method for manufacturing semiconductor device
12593717 · 2026-03-31 · ·

According to one embodiment, a semiconductor device includes a wiring substrate having a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface. A first electrode is on the first surface. A semiconductor element is on the wiring substrate and electrically connected to the first electrode. A resin layer covers the semiconductor element and the first surface from a first direction orthogonal to the first surface. A portion of the resin layer contacts the side surface of the wiring substrate from a second direction parallel to the first surface. The resin layer has an outside side surface that is substantially parallel to the first direction.