A method of forming silicon within a gap on a surface of a substrate. The method includes use of two or more pyrometers to measure temperatures at two or more positions on a substrate and/or a substrate support and a plurality of heaters that can be divided into zones of heaters, wherein the heaters or zones of heaters can be independently controlled based on the measured temperatures and desired temperature profiles.

A method for calibration including determining a temperature induced offset in a pedestal of a process module under a temperature condition for a process. The method includes delivering a wafer to the pedestal of the process module by a robot, and detecting an entry offset. The method includes rotating the wafer over the pedestal by an angle. The method includes removing the wafer from the pedestal by the robot and measuring an exit offset. The method includes determining a magnitude and direction of the temperature induced offset using the entry offset and exit offset.

A system for controlling flatness of an epitaxial semiconductor wafer includes a polishing assembly, a measuring device, and a computer system in communication with the polishing assembly and the measuring device. The computer system stores and executes instructions that cause the computer system to measure one or more epitaxial semiconductor wafers to determine an epitaxial deposition layer profile produced by an epitaxy apparatus, polish a semiconductor wafer using a polishing assembly and measure the polished semiconductor wafer to determine a surface profile of the polished wafer, generate a predicted post-epitaxy surface profile of the polished wafer by comparing the surface profile of the polished wafer and the determined epitaxial deposition layer profile produced by the epitaxy apparatus, determine a predicted post-epitaxy parameter based on the predicted post-epitaxy surface profile and adjust, based on the predicted post-epitaxy parameter, a process condition of the polishing assembly.

An apparatus for measuring bow of a wafer includes a substrate holder including a support surface configured to support a wafer, and an air flow system including a plurality of air outlets in the support surface which are configured to output air for elevating the wafer above the substrate holder. A capacitor array unit including a plurality of electrodes laterally spaced from one another in the capacitor array unit, each electrode facing the support surface and being spaced a respective fixed distance from the support surface such that each electrode can form a capacitor with an opposing area of a wafer elevated by the substrate holder.

A method of operating a reactor system to provide multi-zone substrate temperature control. The method includes, with a first pyrometer, sensing a temperature of a first zone of a substrate supported in the reactor system, and, with a second pyrometer, sensing a temperature of a second zone of the substrate. The method further includes, with a controller, comparing the temperatures of the first and second zones to setpoint temperatures for the first and second zones and, in response, generating control signals to control heating of the substrate. The method also includes controlling, based on the control signals, operations of a heater assembly operating to heat the substrate.

The method including forming a first photoresist (PR) pattern by exposing first field areas of a first PR layer, forming a second PR pattern by exposing first top field areas and first bottom field areas of a second PR layer, measuring a first top intra-field overlay for the first top field areas and a first bottom intra-field overlay for the first bottom field areas, and determining a top intra-field correction parameter and a bottom intra-field correction parameter based on the first top intra-field overlay and the first bottom intra-field overlay, respectively, may be provided.

An apparatus and a method for forming a semiconductor structure are provided. The apparatus includes a polishing pad, a polishing head and a temperature control module. The polishing head mounts a substrate against the polishing pad. The temperature control module faces the polishing pad. The temperature control module includes a first temperature controller and a second temperature controller. The first temperature controller is configured to control a first temperature of a first zone of the polishing pad. The second temperature controller is configured to control a second temperature of a second zone of the polishing pad.

A method of processing a wafer includes forming a bonded wafer assembly by bonding one of opposite surfaces of a first wafer to a second wafer, the first wafer having a device region and an outer circumferential excessive region, applying a laser beam to the first wafer while positioning a focused spot of the laser beam radially inwardly from the outer circumferential edge of the first wafer, on an inclined plane that is progressively closer to the one of the opposite surfaces of the first wafer toward the outer circumferential edge, thereby forming a separation layer shaped as a side surface of a truncated cone, grinding the first wafer from the other one of the opposite surfaces thereof to thin down the first wafer to a predetermined thickness, and detecting whether or not the outer circumferential excessive region has been removed from the first wafer.

A stacked semiconductor apparatus, which is formed by stacking a first die and a second die, includes the first die including a first test module configured to generate a test pattern and a plurality of transmission multiplexers, each of which one input receives the test pattern, the second die including a plurality of reception multiplexers and a second test module configured to control the plurality of reception multiplexers, and a connection part including a plurality of signal transmission members electrically connected to outputs of the plurality of transmission multiplexers and each connected to one input of the reception multiplexers, and a robust transmission member configured to transmit a signal between the first test module and the second test module, wherein the second test module transmits a signal, which is received by the reception multiplexer through the signal transmission member, to the first test module through the robust transmission member, and the first test module detects a fault of the signal transmission member by comparing the test pattern with the signal transmitted by the second test module through the robust transmission member.

A method for detecting impurities on a surface of a silicon wafer for manufacturing semiconductors, the impurities not being able to be detected by a conventional inspection method, a method for manufacturing the silicon wafer for manufacturing semiconductors having the impurities removed from the surface thereof, and a method for screening wafers for manufacturing semiconductors. This method for detecting impurities on a surface of a wafer for manufacturing semiconductors includes: a step for coating the surface of the wafer with a film-forming composition, and performing baking to form a film; and then a step for detecting impurities by means of a wafer inspection tool.