Patent classifications
H10P72/0616
Warpage amount estimation apparatus and warpage amount estimation method
A warpage amount estimation apparatus that estimates a warpage amount of a substrate includes a processor and a memory. The processor acquires a captured image of one surface of an estimation target substrate. The processor calculates a rate of change in pixel value relating to a substrate radial direction in the captured image of the one surface of the estimation target substrate. The processor estimates a warpage amount of the estimation target substrate based on a correlation obtained in advance between a rate of change in pixel value relating to the substrate radial direction in a captured image of the one surface of a substrate and a warpage amount of the substrate, and on a calculation result of the rate of change which is calculated.
Substrate inspection system and method of manufacturing semiconductor device using substrate inspection system
A substrate inspection apparatus includes a light source unit, a pulsed beam matching unit, a substrate support unit, an incidence angle adjusting unit, and a detecting unit. The light source unit emits first and second laser beams. The pulsed beam matching unit matches the first and second laser beams to superimpose a pulse of the first laser beam on a pulse of the second laser beam in time and space. The incidence angle adjusting unit adjusts angles of incidence of the matched first laser beam and second laser beams to irradiate the first laser beam and the second laser beam on the substrate, and mixes the first and second laser beams to generate an evanescent wave on the substrate. The evanescent wave generates scattered light due to a defect of the substrate. The detecting unit detects the scattered light generated due to the defect of the substrate.
Semiconductor device manufacturing system and semiconductor device manufacturing method
The invention is to provide a semiconductor manufacturing apparatus system and a semiconductor device manufacturing method for reducing particles having an adverse effect in a manufacturing step of a semiconductor device. A semiconductor device manufacturing system, includes: a semiconductor manufacturing apparatus; and a platform connected to the semiconductor manufacturing apparatus via a network and in which a particle reduction processing is executed, in which the particle reduction processing includes: a step of acquiring a particle characteristic value by using a sample processed by the semiconductor manufacturing apparatus; a step of specifying a component of the semiconductor manufacturing apparatus leading to a particle generation based on the acquired particle characteristic value and correlation data by machine learning; a step of defining a cleaning condition for cleaning the semiconductor manufacturing apparatus based on the specified component; and a step of cleaning the semiconductor manufacturing apparatus using the defined cleaning condition, and the correlation data is correlation data between the particle characteristic value acquired in advance and the component.
SEMICONDUCTOR MANUFACTURING OUTLIER DETECTION BASED ON MACHINE LEARNING
According to certain aspects, one or more processors can be configured to: determine a limit for detecting a lot associated with a specified product as an anomaly based on one or more machine learning models, the limit for detecting a lot associated with the specified product as an anomaly enabling a semiconductor manufacturing system to identify one or more defective lots at an earlier point in time than using another limit associated with the specified product determined based on a statistical method, and to identify one or more defective lots that do not satisfy the other limit based on the statistical method; in response to a failure rate of a first lot in connection with the parameter satisfying the limit, identify the first lot as an anomaly and automatically hold the first lot in order to address defects associated with the first lot in real time.
Single-Material Waveplates for Pupil Polarization Filtering
A method includes illuminating a target and collecting light scattered from the illuminated target. The collected light scattered from the illuminated target has an elliptical polarization that varies spatially across a collection pupil. The method also includes converting the polarization of the collected light from the elliptical polarization that varies spatially across the collection pupil to a linear polarization that is uniformly oriented across the collection pupil, using one or more single-material gratings. The one or more single-material gratings have phase retardation that varies spatially across the collection pupil in accordance with the elliptical polarization. The method further includes filtering out the light having the linear polarization that is uniformly oriented across the collection pupil, using a linear polarizer.
METHOD OF MONITORING SUBSTRATE CHUCK CLEANLINESS USING THE SPREAD FRONT
A method for monitoring substrate chuck flatness by monitoring a spread front using a spread camera to detect a change in flatness of a substrate chuck in real time. The method includes obtaining multiple fluid spread image sequences containing interference fringes that appear during a film shaping process for a series of substrates, determining locations of outliers based on radial distances of the interference fringes for each substrate from the series of substrates and applying a corrective action to the substrate chuck when there are repeating outliers at similar locations across multiple substrates from the series of substrates.
Diagnostic device, semiconductor manufacturing equipment system, semiconductor equipment manufacturing system, and diagnostic method
An object of the present disclosure is to provide a diagnostic technique capable of determining an anomaly of an exhaust device or an exhaust pipe of a semiconductor manufacturing apparatus while suppressing variations due to processing conditions. In a diagnostic device for diagnosing a state of a semiconductor manufacturing apparatus including: a processing chamber in which a sample is processed; a transfer chamber that is connected to the processing chamber and transfers the sample to the processing chamber; a valve that is disposed between the processing chamber and the transfer chamber; and an exhaust device for exhausting the processing chamber, wherein whether or not there is an anomaly in the exhaust device or an exhaust pipe regarding the exhaust device is determined on the basis of a pressure regarding the exhaust device after the valve is opened.
Integrated inspection for enhanced hybrid bonding yield in advanced semiconductor packaging manufacturing
Methods and apparatus of hybrid bonding with inspection are provided herein. In some embodiments, a method of hybrid bonding with inspection includes: cleaning a substrate via a first cleaning chamber and a tape frame having a plurality of chiplets via a second cleaning chamber; inspecting, via a first metrology system, the substrate for pre-bond defects in a first metrology chamber and the tape frame for pre-bond defects in a second metrology chamber; bonding one or more of the plurality of chiplets to the substrate via a hybrid bonding process in a bonder chamber to form a bonded substrate; and performing, via a second metrology system different than the first metrology system, a post-bond inspection of the bonded substrate via a third metrology chamber for post-bond defects.
REDUCING THERMAL BOW SHIFT
Provided are methods and structures for keeping the integrity of layers deposited on a semiconductor wafer through a thermal cycle. Deposition of a second backside layer, or a cap, with an internal stress opposite to a first backside layer may be used to reduce bow shift of a wafer during a thermal cycle. The first backside layer may have a tensile internal stress or a compressive internal stress. The second backside layer has an internal stress opposite to the first backside layer. Each of the backside layers may be deposited by a backside deposition apparatus.
Semiconductor cleaning apparatus and method
The present disclosure describes a chuck-based device and a method for cleaning a semiconductor manufacturing system. The semiconductor manufacturing system can include a chamber, a chuck housed in the chamber and configured to hold a substrate, and a control device configured to control a translational displacement and a rotation of the chuck. The chuck can include a passage extending along a periphery of the chuck and dividing the chuck into an inner portion and an outer sidewall portion, and a first multiple of openings through the outer sidewall portion of the chuck and interconnected with the passage. The passage can be configured to transport a fluid. The first multiple of openings can be configured to dispense the fluid.