H10P14/69215

Substrate processing method

A method of processing a substrate having a gap includes loading the substrate onto a substrate support unit, supplying an oligomeric silicon precursor and a nitrogen-containing gas to the substrate through a gas supply unit on the substrate support unit, and generating a direct plasma in a reaction space by applying a voltage to at least one of the substrate support unit and the gas supply unit, wherein a plurality of sub-steps are performed during the supplying of the oligomeric silicon precursor and the nitrogen-containing gas and the generating a direct plasma, and different plasma duty ratios are applied during the plurality of sub-steps.

Oxidants and strained-ring precursors

Novel cyclic silicon precursors and oxidants are described. Methods for depositing silicon-containing films on a substrate are described. The substrate is exposed to a silicon precursor and a reactant to form the silicon-containing film (e.g., elemental silicon, silicon oxide, silicon nitride). The exposures can be sequential or simultaneous.

SEMICONDUCTOR POWER DEVICE AND METHOD FOR PRODUCING SAME
20260040644 · 2026-02-05 · ·

A method for producing a semiconductor power device includes forming a gate trench from a surface of the semiconductor layer toward an inside thereof. A first insulation film is formed on the inner surface of the gate trench. The method also includes removing a part on a bottom surface of the gate trench in the first insulation film. A second insulation film having a dielectric constant higher than SiO2 is formed in such a way as to cover the bottom surface of the gate trench exposed by removing the first insulation film.

WORDLINE CONTACT ISOLATION STRUCTURE AND METHOD
20260040535 · 2026-02-05 ·

Devices and methods are disclosed, including transistors, semiconductor devices and systems. Example semiconductor devices and methods include interconnect structures with lateral isolation structures around a vertical conductor. Devices and methods are shown where the isolation structures are located with a staircase configuration in a memory device with an array of vertical memory strings.

POST-GAP FILL TREATMENT FOR SEAM REDUCTION

Exemplary processing methods may include performing a silicon-containing atomic layer deposition (ALD) process. The silicon-containing ALD process may deposit a silicon-containing material in a feature defined in a substrate disposed in a processing region of a semiconductor processing chamber. The methods may include providing an oxygen-containing precursor to a processing region. The methods may include contacting the substrate with the oxygen-containing precursor. The contacting may at least partially reduce a presence of a seam in the silicon-containing material.

TREATMENTS TO CONTROL THICKNESS OF OXYGEN-CONTAINING MATERIALS

Exemplary processing methods may include providing one or more deposition precursors to a processing region of a semiconductor processing chamber. A substrate including a plurality of layers of a silicon-containing material may be housed within the processing region. Adjacent layers of the silicon-containing material may be vertically spaced apart to define a plurality of lateral gaps. One or more features may extend through the plurality of layers of the silicon-containing material and into the substrate. The methods may include depositing a flowable oxygen-containing material on the substrate in the plurality of lateral gaps and in the one or more features extending into the substrate. The methods may include providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber. The methods may include contacting the substrate with the hydrogen-containing precursor while applying a bias power. The contacting may reduce a thickness of the flowable oxygen-containing material.

SEMICONDUCTOR DEVICE HAVING SCULPTED CORNERS AND METHODS FOR MANUFACTURING THE SAME
20260040850 · 2026-02-05 ·

A method for forming a semiconductor device is disclosed herein. The method includes forming a gradient oxide layer on a surface of a substrate, the etch rate of the gradient oxide layer varies along a thickness of the gradient oxide layer, forming a trench through the gradient oxide layer and into the substrate, the trench at least partially defined by a sidewall of the substrate, wherein the surface and the sidewall are connected to form a corner of the substrate, removing a portion of the gradient oxide layer adjacent the corner, wherein a portion of the surface of the substrate is exposed as a result of removing the portion of the gradient oxide layer, and performing an etching process on the exposed corner of the substrate to form a rounded corner that transitions from the surface of the substrate to the sidewall of the substrate.

Multilayer masking layer and method of forming same

A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.

Oxide film coating solution and semiconductor device manufacturing method using the same

A method for manufacturing a semiconductor device, the method including forming a fin type pattern including a lower pattern and an upper pattern on a substrate, the upper pattern including a plurality of sacrificial layers and a plurality of sheet patterns alternately stacked on the lower pattern; forming a field insulating film on the substrate and the fin type pattern such that the field insulation film covers side walls of the lower pattern; forming a passivation film on the field insulating film such that the passivation film extends along an upper surface of the field insulating film; and removing the plurality of sacrificial layers after forming the passivation film.

Semiconductor structure and method for forming the same

A semiconductor structure and a method of forming is provided. The semiconductor structure includes nanostructures separated from one another and stacked over a substrate, a gate stack wrapping around the nanostructures, and a dielectric fin structure laterally spaced apart from the nanostructures by the gate stack. The dielectric fin structure include a lining layer and a fill layer nested within the lining layer. The lining layer is made of a carbon-containing dielectric material, and a carbon concentration of the lining layer varies in a direction from the gate stack to the lining layer.