There is provided a technique that includes: forming a nitride film containing a predetermined element on a substrate in a process chamber by performing a cycle a predetermined number of times, the cycle including sequentially performing: (a) supplying a first precursor gas containing a molecular structure containing the predetermined element to the substrate with a pressure of the process chamber being set to a first pressure; (b) supplying a second precursor gas, which is different from the first precursor gas and contains a molecular structure containing the predetermined element and not containing a bond between atoms of the predetermined element, to the substrate with the pressure of the process chamber being set to a second pressure higher than the first pressure; and (c) supplying a nitriding agent to the substrate.

There is provided a technique that includes: (a) preparing a substrate including a nitrogen-containing film, which is formed to be thicker by a thickness T.sub.2 than a target thickness T.sub.1, and an oxide film on a surface of the substrate; and (b) etching the oxide film on the surface of the substrate using a substance X generated by supplying a fluorine-containing substance to the substrate and chemically reacting the nitrogen-containing film with the fluorine-containing substance.

Methods and apparatuses for depositing dielectric films into features on semiconductor substrates are described herein. Methods involve depositing dielectric films by using controlled thermal chemical vapor deposition, with periodic passivation operations and densification to modulate film properties.

A method for fabricating semiconductor devices is disclosed. The method includes forming a stack over a substrate. The method includes forming a hardmask layer over the stack, the hardmask layer comprising a first tungsten containing sub-layer, and at least one compressive sub-layer and at least one tensile sub-layer. The method includes forming a patternable layer over the hardmask layer. The method includes etching the hardmask layer according to the patternable layer.

Aspects of the present disclosure provide an inhibitor-free method for filling a recessed feature of a substrate. For example, the inhibitor-free method can include providing a substrate that has a recessed feature, forming a first layer of an insulating material on the substrate to cover a sidewall and bottom of the recessed feature, removing a portion of the first layer such that the recessed feature with the first layer remaining therein slopes outward, and forming a second layer of the insulating material on the substrate to cover the first layer remaining in the recessed feature.

A method of processing a substrate that includes: forming a conformal etch stop layer (ESL) over a staircase pattern of the substrate, the staircase pattern including staircases, each of the staircases including a conductive surface; forming a dielectric layer over the ESL; planarizing a top surface of the dielectric layer; forming a patterned hardmask over the dielectric layer; and etching the dielectric layer selectively to the ESL using the patterned hardmask as an etch mask to form a plurality of recesses, each of the plurality of recesses landing on each of the staircases, the ESL protecting the conductive surface from the etching, the etching including exposing the substrate to a plasma generated from a process gas including a fluorocarbon, O.sub.2, and WF.sub.6, a flow rate of WF.sub.6 being between 0.01% and 1% of a total gas flow rate of the process gas.

A method of manufacturing a semiconductor device includes: forming a silicon oxide film covering each of a first main surface and a second main surface of a semiconductor substrate; forming a redistribution wiring on the first main surface side of the semiconductor substrate; and grinding the second main surface of the semiconductor substrate. This grinding step is performed in a state in which a thickness of the silicon oxide film positioned on the second main surface is equal to or larger than 10 nm and equal to or smaller than 30 nm.

A semiconductor chip and a semiconductor package, the semiconductor chip includes a semiconductor substrate; a through electrode penetrating the semiconductor substrate; a bonding pad including a first conductive pad connected to the through electrode, and a second conductive pad on a central portion of the first conductive pad, an outer portion of the first conductive pad protruding outwardly relative to a sidewall of the second conductive pad; and a pad insulating layer on the semiconductor substrate and surrounding a sidewall of the first conductive pad and the sidewall of the second conductive pad.

A semiconductor device includes a fin structure that protrudes vertically out of a substrate, wherein the fin structure contains silicon germanium (SiGe). An epi-silicon layer is disposed on a sidewall of the fin structure. The epi-silicon layer contains nitrogen. One or more dielectric liner layers are disposed on the epi-silicon layer. A dielectric isolation structure is disposed over the one or more dielectric liner layers.

A method for developing a passivation film on a substrate with less than 10 atomic % of hydrogen includes providing the substrate within a processing station of a substrate processing system. A resultant passivation film is formed with less than 10 atomic % of hydrogen on the substrate by performing the following steps of depositing a passivation film sub-layer on the substrate, where the passivation film sub-layer lays on a semiconductor device layer or directly on a previously deposited passivation film sub-layer, and after depositing the passivation film sub-layer, performing a post plasma treatment to the passivation film sub-layer with at least one of nitrogen and argon to reduce hydrogen content within the passivation film sub-layer.