There is provided a technique that includes forming a film on at least one substrate by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: (a) performing a first set a number of times, the first set including non-simultaneously performing: supplying a precursor to the at least one substrate from at least one first ejecting hole of a first nozzle arranged along a substrate arrangement direction of a substrate arrangement region where the at least one substrate is arranged; and supplying a reactant to the at least one substrate; and (b) performing a second set a number of times, the second set including non-simultaneously performing: supplying the precursor to the at least one substrate from at least one second ejecting hole of a second nozzle arranged along the substrate arrangement direction of the substrate arrangement region; and supplying the reactant to the at least one substrate.

A semiconductor device structure and methods of forming the same are described. In some embodiments, the method includes forming a dielectric layer, which includes forming an as deposited layer using an atomic layer deposition process, which includes flowing a silicon source precursor into a process chamber at a first flow rate, flowing a carbon and nitrogen source precursor into the process chamber at a second flow rate, and flowing an oxygen source precursor into the process chamber at a third flow rate. A ratio of the first flow rate to the second flow rate to the third flow rate ranges between about one to one to eight and one to one to twelve, and the as deposited layer has a carbon concentration substantially greater than a nitrogen concentration. The method further includes annealing the as deposited layer in an environment including H.sub.2O to form the dielectric layer.

The present disclosure is directed to formation of a low-k spacer. For example, the present disclosure includes an exemplary method of forming the low-k spacer. The method includes depositing the low-k spacer and subsequently treating the low-k spacer with a plasma and/or a thermal anneal. The low-k spacer can be deposited on a structure protruding from the substrate. The plasma and/or thermal anneal treatment on the low-k spacer can reduce the etch rates of the spacer so that the spacer is etched less in subsequent etching or cleaning processes.

There is provided a technique including: at least one pipe heater configured to heat at least one gas pipe configured to supply a gas to a process chamber in which a substrate is processed; at least one temperature detector configured to detect a temperature of the at least one gas pipe; at least one temperature controller configured to be capable of, based on the temperature detected by the at least one temperature detector, outputting a manipulated variable indicating electric power to be supplied to the at least one pipe heater, and controlling the temperature of the at least one gas pipe to approach at least one desired setpoint; and a host controller configured to be capable of controlling start and stop of heating of the at least one gas pipe performed under the control of the at least one temperature controller.

A method for improving the elastic modulus of dense organosilica dielectric films (k2.7) without negatively impacting the film's electrical properties and with minimal to no reduction in the carbon content of the film. The method comprising the steps of: providing a substrate within a reaction chamber; introducing into the reaction chamber a gaseous composition comprising a mixture of an alkyl-alkoxysilacyclic compound and 5% or less of certain bis(alkoxy)silanes or mono-alkoxysilanes; and applying energy to the gaseous composition comprising the mixture of the alkyl-alkoxysilacyclic compound and 5% or less of certain bis(alkoxy)silanes or mono-alkoxysilanes to deposit an organosilicon film on the substrate, wherein the organosilicon film has a dielectric constant from 2.70 to 3.30, an elastic modulus of from 6 to 30 GPa, and an at. % carbon from 10 to 45 as measured by XPS.

A SiC semiconductor device manufacturing method includes a step of etching a surface of a SiC substrate 1 with H.sub.2 gas under Si-excess atmosphere within a temperature range of 1000 C. to 1350 C., a step of depositing, by a CVD method, a SiO.sub.2 film 2 on the SiC substrate 1 at such a temperature that the SiC substrate 1 is not oxidized, and a step of thermally treating the SiC substrate 1, on which the SiO.sub.2 film 2 is deposited, in NO gas atmosphere within a temperature range of 1150 C. to 1350 C.

A film forming method includes: a supply operation of supplying a processing gas into a processing container in which a substrate is accommodated, the processing gas including a silicon-containing gas, a nitrogen-containing gas, and a diluent gas; and a film forming operation of plasmarizing the processing gas by supplying, into the processing container, power obtained by phase-controlling and superimposing first power with a first frequency in a VHF band and second power with a second frequency different from the first frequency in the VHF band, and forming a silicon nitride film on the substrate by the plasmarized processing gas.

A method for forming an insulating layer pattern includes providing a substrate including two or more different types of dielectric layer regions; selectively forming a blocking layer on the substrate to include a first region on which a blocking layer is formed and a second region on which no blocking layer is formed or the blocking layer is formed less than in the first region; selectively forming an insulating layer on the second region; and etching a portion of an upper portion of the insulating layer.

A silicon-on-insulator substrate includes: (1) a high-resistivity base layer including silicon and a trap-rich region including arsenic diffused within a first side of the high-resistivity base layer, wherein the trap-rich region has a thickness that is in a range of 1 to 10 microns and a trap density that is in a range of 0.8*10.sup.10 cm.sup.2 eV.sup.1 to 1.2*10.sup.10 cm.sup.2 eV.sup.1, wherein the high-resistivity base layer has resistivity in a range of 50 to 100 ohm-meters and a thickness in a range of 500 to 700 microns; (2) a silicon dioxide layer positioned on the first side of the high-resistivity base layer and having a thickness that is in a range of 1000 to 5000 angstroms; and (3) a transfer layer positioned on the silicon dioxide layer, wherein the transfer layer comprises a silicon wafer having a thickness that is a range of 500 to 5000 angstroms.

There is provided a technique that includes: forming a nitride film on a substrate by performing a cycle a predetermined number of times, the cycle including: (a) supplying a precursor to the substrate; (b) supplying a nitriding agent to the substrate; and (c) supplying an active species X, which is generated by plasma-exciting an inert gas, to the substrate, wherein a stress of the nitride film is controlled to be between a tensile stress and a compressive stress or is controlled to be the compressive stress by controlling an amount of exposure of the active species X to a surface of the substrate in (c).