Disclosed is a semiconductor device and semiconductor fabrication method. A semiconductor device includes: a gate structure over a semiconductor substrate, having a low-k dielectric layer, a high-k dielectric layer, a p-type work function metal layer, an n-type work function metal layer, a silicon oxide scap layer, and a glue layer; and a continuous tungsten (W) cap over the gate structure that was formed by the gate structure being pretreated, W material being deposited and etched back, the scap layer being etched, additional W material being deposited, and unwanted W material being removed. A semiconductor fabrication method includes: receiving a gate structure; pretreating the gate structure; depositing W material on the gate structure; etching back the W material; etching the scap layer; depositing additional W material; and removing unwanted W material.

Methods and apparatus for controlling substrate temperature includes: measuring a substrate that has undergone a deposition process; analyzing measurements of the substrate to detect a defect of the substrate; and sending a feedback signal to modify a temperature control parameter of a temperature controller used in controlling a temperature of the substrate in the deposition process based on the analyzing if a defect is detected, and not sending a feedback signal to modify the temperature control parameter if a defect is not detected.

Provided is a manufacturing method of a semiconductor device including a semiconductor substrate, including: forming an interlayer dielectric film above the semiconductor substrate; forming contact holes exposed from a part of an upper surface of the semiconductor substrate on the interlayer dielectric film; and forming an metal electrode including an element of aluminum by DC sputtering above the interlayer dielectric film and inside the contact holes, wherein in at least a part of a process of forming the metal electrode in forming the electrode, a heating temperature that is a temperature for heating the semiconductor substrate is 400 C. or higher, and a DC sputtering power is 5 kW or lower.

Methods and apparatus for processing a substrate are provided. For example, a method includes sputtering a material from a target in a PVD chamber to form a material layer on a layer comprising a feature of the substrate, the feature having an opening width defined by a first sidewall and a second sidewall, the material layer having a greater lateral thickness at the top surface of the layer than a thickness on the first sidewall or the second sidewall within the feature, depositing additional material on the layer by biasing the layer with an RF bias at a low power, etching the material layer from the layer by biasing the layer with an RF bias at a high-power, and repeatedly alternating between the low power and the high-power at a predetermined frequency.

A deposition tool includes a rotatable chuck and/or a pulsed direct current (DC) bias source. The pulsed DC source may be used to pulse a DC power in the processing chamber to achieve a lower electron temperature in the processing chamber, which enables the material from a material target to be directed toward the semiconductor substrate in a highly directional manner. This enables a low angle of deposition to be achieved for depositing the material, which enables the material to be evenly and symmetrically deposited onto sidewalls of recesses in the semiconductor substrate. Additionally and/or alternatively, the rotatable chuck may be used to rotate the semiconductor substrate during deposition of the layer onto the semiconductor substrate to compensate for nonuniformities in the deposition rate of the layer across the semiconductor substrate. This enables a high horizontal thickness uniformity across the semiconductor substrate.

Disclosed is a semiconductor device and semiconductor fabrication method. A semiconductor device includes: a gate structure over a semiconductor substrate, having a low-k dielectric layer, a high-k dielectric layer, a p-type work function metal layer, an n-type work function metal layer, a silicon oxide scap layer, and a glue layer; and a continuous tungsten (W) cap over the gate structure that was formed by the gate structure being pretreated, W material being deposited and etched back, the scap layer being etched, additional W material being deposited, and unwanted W material being removed. A semiconductor fabrication method includes: receiving a gate structure; pretreating the gate structure; depositing W material on the gate structure; etching back the W material; etching the scap layer; depositing additional W material; and removing unwanted W material.

Described are various embodiments of a system and method for controlling film thickness, and a film deposition system and method using same. In one such embodiments, a vapour deposition system for spatially controlling a deposited film thickness on a substrate comprises: an emission source; a substrate holder; and a translatable shutter comprising a flux barrier disposed between said emission source and the substrate and operable to translate said flux barrier through a deposition flux according to a designated linear translation profile designated to spatially control the deposited film thickness.

A method includes placing a wafer on a wafer holder, depositing a film on a front surface of the wafer, and blowing a gas through ports in a redistributor onto a back surface of the wafer at a same time the deposition is performed. The gas is selected from a group consisting of nitrogen (N.sub.2), He, Ne, and combinations thereof.

A method for semiconductor manufacturing includes providing a substrate into a plasma processing chamber, forming a ruthenium layer over the substrate with a physical vapor deposition using a sputtering gas including krypton or xenon, and forming a ruthenium feature from the ruthenium layer with a subtractive process. The physical vapor deposition is performed at a substrate temperature of less than 100 C.