A package structure includes a circuit substrate, a semiconductor package, a lid structure, a passive device and a barrier structure. The semiconductor package is disposed on and electrically connected to the circuit substrate. The lid structure is disposed on the circuit substrate covering the semiconductor package. The lid structure is attached to the circuit substrate through an adhesive material. The passive device is disposed on the circuit substrate in between the semiconductor package and the lid structure. The barrier structure is separating the passive device from the lid structure and the adhesive material, and the barrier structure is in contact with the adhesive material.

A semiconductor device enables obtainment of an attachment state of a cover member in order to obtain good handleability and to prevent foreign matter from entering the inside of a package, and enables the cover member to be easily removed in order to solve problems such as ghost and flare caused by the presence of the cover member. The semiconductor device includes: a substrate; a semiconductor element mounted on the substrate; a cover member covering the semiconductor element from above; a frame supporting the cover member relative to the substrate; and a cover holding portion detachably holding the cover member relative to at least a part of the frame.

A power converter assembly includes an interposer; an integrated circuit, such as a power management integrated circuit, arranged in a cavity or pocket of the interposer or monolithically integrated in the interposer; one or more electrical components stacked on a top side of the interposer; and one or more vias arranged in the interposer forming electrical connections in the interposer, wherein the integrated circuit and the electrical components are configured to perform a power conversion of an input voltage to an output voltage.

Various aspects of the present disclosure generally relate to an integrated circuit device, such as a packaged integrated circuit device. In some aspects, an integrated circuit device includes a semiconductor die and a lid thermally coupled to the semiconductor die. The lid includes a two-phase thermal management device. The integrated circuit device also includes an interface layer in contact with the semiconductor die and the lid.

In one example, an electronic device comprises a substrate comprising a conductive structure and an inner side and an outer side, a first electronic component over the inner side of the substrate and coupled with the conductive structure, a lid over the substrate and the first electronic component and comprising a first hole in the lid, and a thermal interface material between the first electronic component and the lid. The thermal interface material is in the first hole. Other examples and related methods are also disclosed herein.

An object is to provide a technique capable of reducing stress in the entire semiconductor device. The semiconductor device includes a plurality of sub-modules including a first sealing member, an insulating substrate provided with a first circuit pattern electrically connected to at least one of the conductive plates of the plurality of sub-modules, connection members electrically connected to at least one of the conductive pieces of the plurality of sub-modules, and a second sealing member having lower hardness than the first sealing member, which seals the plurality of sub-modules, the insulating substrate, and the connection members.

A semiconductor package includes a number of different substrate sections. Each substrate section includes one or more electronic components. Additionally, each substrate section is mechanically and electrically coupled together using various conductive columns and conductive apertures. Because the substrate sections are interconnectable, a shape and/or a size of the semiconductor package is fully customizable. Additionally, a layout of the various electronic components of the semiconductor package is also fully customizable.

A chip package structure includes an assembly containing an interposer and semiconductor dies; a packaging substrate attached to the assembly through solder material portions; and a lid structure attached to the packaging substrate. The lid structure includes: a first plate portion having a first thickness and located in an interposer-projection region having an areal overlap with the interposer in a plan view; a second plate portion having a second thickness that is less than the first thickness, laterally surrounding, and adjoined to, the first plate portion, and located outside the interposer-projection region; and a plurality of foot portions adjoined to the second plate portion, laterally spaced from the first plate portion, and attached to a respective top surface segment of the packaging substrate through a respective adhesive portion.

A chip package structure includes an assembly containing an interposer and semiconductor dies; a packaging substrate attached to the assembly through solder material portions; and a lid structure attached to the packaging substrate. The lid structure includes: a first plate portion having a first thickness and located in an interposer-projection region having an areal overlap with the interposer in a plan view; a second plate portion having a second thickness that is less than the first thickness, laterally surrounding, and adjoined to, the first plate portion, and located outside the interposer-projection region; and a plurality of foot portions adjoined to the second plate portion, laterally spaced from the first plate portion, and attached to a respective top surface segment of the packaging substrate through a respective adhesive portion.

A semiconductor module comprises a metallic sheet comprising a first surface. The semiconductor module further comprises a semiconductor die coupled to the first surface of the metallic sheet. An electrically insulative housing comprises a circumferential frame, wherein the electrically insulative housing encloses the semiconductor die and at least a part of the first surface of the metallic sheet. Furthermore, a joining section of the circumferential frame is directly joined to the first surface of the metallic sheet, wherein an electrically inducible element is enclosed near the joining section of the circumferential frame.