A semiconductor device includes a substrate having a semiconductor chip mounted thereon, a heat dissipation plate having a front surface on which the substrate is disposed, a case including a side wall disposed on the front surface of the heat dissipation plate so as to surround a housing space accommodating the substrate therein together with the heat dissipation plate and a lid disposed on the side wall to cover the housing space, and a sealing member filling the housing space to seal the substrate. The lid has a through hole and a projection (or a groove) provided on the inner surface of the lid, configured to surround the through hole so as not to contact the sealing member such that the projection forms a plurality of circumferential patterns around the through hole in plan view.

According to the present disclosure, a semiconductor apparatus comprises a housing a semiconductor chip installed in the housing, and a first radio tag installed on the housing. The first radio tag is installed in a state where rewriting from outside is not limited.

Provided is a technique for enhancing the accuracy of deterioration diagnosis in a semiconductor device. The semiconductor device relating to the technique disclosed in the present specification is provided with a case, a semiconductor chip inside the case, a metal wire bonded to an upper surface of the semiconductor chip, at least one test piece inside the case, and a pair of terminals provided outside the case and connected to the test piece. The test piece is separated from the metal wire inside the case.

Embodiments of this application disclose a chip package structure and an electronic device. The chip package structure includes a substrate and a housing; a chip and a supporting member, disposed on a first surface of the substrate, where the supporting member is disposed around the chip, and both the chip and the supporting member are located in a cavity; a spraying module which is disposed on the housing; and a first sealing member which is disposed between the supporting member and the housing. In this way, heat may be dissipated for the chip in a liquid cooling manner, thereby improving heat dissipation performance of the chip. The sealing member is disposed between the supporting member and the housing along a radial direction, to seal a region outside the first surface of the substrate. In addition, this facilitates disassembly/assembly, and reduces pressure on the chip during mounting.

A housing for a semiconductor module includes sidewalls extending horizontally around an internal volume of the housing and a groove formed in a bottom surface of the sidewalls and extending along a circumference of the housing. The bottom surface of the sidewalls is configured to be attached to a substrate or a base plate. The groove extends into the sidewalls of the housing in a vertical direction. The groove includes a first section having a constant width in a horizontal direction and beveled edges between the first section and the bottom surface of the sidewalls. The beveled edges define a second section arranged between the first section and the bottom surface of the sidewalls, and having a varying width in the horizontal direction. The width of the second section gradually increases from the first section towards the bottom surface of the sidewalls.

A semiconductor module arrangement includes: a housing; a substrate arranged in or forming a bottom of the housing; a bus bar including a first end and a second end opposite the first end, the first end being arranged inside the housing and the second end extending to outside of the housing; and at least one connecting element mechanically and electrically coupled to a top surface of the substrate. The first end of the bus bar is arranged distant from the substrate in a vertical direction. The vertical direction is a direction perpendicular to the top surface of the substrate. The first end of the bus bar is electrically coupled to at least one of the at least one connecting element by one or more electrical connections.

A power module includes a first end power semiconductor element and a second end power semiconductor element. A first sum is a sum of a path length between the gate electrode of the first end power semiconductor element and a first control terminal and a path length between the source electrode of the first end power semiconductor element and a first detection terminal. A second sum is a sum of a path length between the gate electrode of the second end power semiconductor element and the first control terminal and a path length between the source electrode of the second end power semiconductor element and the first detection terminal. The power module includes a first control layer connected to the gate electrode. The first control layer includes a first detour portion that detours the path to reduce a difference between the first sum and the second sum.

A semiconductor device includes a circuit substrate, a semiconductor package, connective terminals and supports. The circuit substrate has a first side and a second side opposite to the first side. The semiconductor package is connected to the first side of the circuit substrate. The connective terminals are located on the second side of the circuit substrate and are electrically connected to the semiconductor package via the circuit substrate. The supports are located on the second side of the circuit substrate beside the connective terminals. A material of the supports has a melting temperature higher than a melting temperature of the connective terminals.

Semiconductor three-dimensional integrated circuit packages and methods of forming the same are disclosed herein. A method includes bonding a semiconductor chip package to a substrate and depositing a thermal interface material on the semiconductor chip package. A thermal lid may be placed over and adhered to the semiconductor chip package by the thermal interface material. The thermal lid includes a wedge feature interfacing the thermal interface material. The thermal lid may be adhered to the semiconductor chip package by curing the thermal interface material.

A semiconductor module includes a laminate substrate including an insulating plate and first and second circuit boards on an upper surface of the insulating plate, the first semiconductor device on an upper surface of the first circuit board, a first main terminal, and a first metal wiring board that electrically connects the first semiconductor device to the first main terminal. The first metal wiring board has a first bonding section bonded to an upper surface electrode of the first semiconductor device, a second bonding section bonded to an upper surface of the second circuit board, a first coupling section that couples the first bonding section to the second bonding section, a first raised section that rises upward from an end portion of the second bonding section. The first raised section has an upper end that is electrically connected to the first main terminal.