An electronic device structure having a shielding structure includes a substrate with an electronic component electrically connected to the substrate. The shielding structure includes conductive spaced-apart pillars that have proximate ends connected to the substrate and distal ends spaced apart from the substrate, and that are laterally spaced apart from the first electronic component. In one embodiment, the conductive pillars are conductive wires. A package body encapsulates the electronic component and the conductive pillars. In one embodiment, the shielding structure further includes a shielding layer disposed adjacent to the package body, which is electrically connected to the conductive pillars. In one embodiment, the electrical connection is made through the package body. In another embodiment, the electrical connection is made through the substrate.

An electronic device is provided. An example electronic device includes: a support structure including a substrate of dielectric material, a top conductive structure, arranged above the substrate, and a bottom conductive structure, arranged below the substrate, the top conductive structure including an annular region, the bottom conductive structure including an array of contacts; a cap coupled to the annular region such that the cap and the support structure delimit a cavity; and at least one semiconductive die in the cavity that generates one or more electric output signals. The array of contacts includes: signal contacts, which receive corresponding electric output signals or electric signals generated outside the electronic device; and reference contacts set to a reference potential. The electronic device further includes a plurality of reinforcement conductive vias, each extending through the substrate and has ends fixed respectively to the annular region and to a corresponding reference contact.

A method includes forming a package component, including forming a thermal via extending through a substrate; and bonding a die to the thermal via; attaching the thermal via of the package component to a first conductive pad of a package substrate, wherein the package substrate includes a heat pipe underneath the first conductive pad; and attaching a support structure to a second conductive pad of the package substrate, wherein the heat pipe is underneath the second conductive pad, wherein the support structure includes a first thermoelectric cooler.

A method of manufacturing a device includes forming a conductive film on a second surface of a substrate having a first surface and the second surface opposite to the first surface by using a non-superconducting material, forming a through hole penetrating the substrate by etching the substrate from the first surface after forming the conductive film, forming a through electrode in the through hole by using a superconducting material by an electroplating method using the conductive film exposed in the through hole as a seed layer, and removing the conductive film after forming the through electrode.

Technologies for conformal power delivery structures near high-speed signal traces are disclosed. In one embodiment, a dielectric layer may be used to keep a power delivery structure spaced apart from high-speed signal traces, preventing deterioration of signals on the high-speed signal traces due to capacitive coupling to the power delivery structure.

A semiconductor package including a lower substrate, a lower semiconductor chip mounted on the lower substrate, a lower mold layer on the lower substrate and enclosing the lower semiconductor chip, a redistribution layer on the lower mold layer, and a vertical connection terminal around the lower semiconductor chip and connecting the lower substrate to the redistribution layer may be provided. The lower semiconductor chip may include a cognition mark at a top surface thereof. The cognition mark may include a marking pattern having an intaglio shape at the top surface of the lower semiconductor chip, and a molding pattern filling an inner space of the marking pattern. A first material constituting the molding pattern may be the same as a second material constituting the lower mold layer.

A package substrate is provided, in which conductive pillars are formed on a circuit layer of a core board body, and an insulating layer encapsulates the conductive pillars in such a manner that the conductive pillars are exposed from a surface of the insulating layer for use as external contacts. Hence, there is no need to fabricate a wiring layer on the insulating layer. Consequently, a thickness of the package substrate is smaller to meet the requirements of thinning.

A carrier plate for preparing a package substrate according to an embodiment includes a dielectric layer, a seed layer in the dielectric layer, and a copper pillar layer on the seed layer. A bottom end of the seed layer is higher than a lower surface of the dielectric layer. A top end of the copper pillar layer is lower than an upper surface of the dielectric layer. The upper and lower surfaces of the dielectric layer are respectively provided with a first metal layer and a second metal layer.

A substrate includes a first TGV unit and a second TGV unit. The second TGV unit is bonded to the first TGV unit. The first TGV unit is electrically connected to the second TGV unit, and a directly bonding interface including a glass-to-glass bonding interface and a metal-to-metal bonding interface is located between the first TGV unit and the second TGV unit. A manufacturing method of a substrate is also provided.

The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor device package. In certain embodiments, a glass or silicon substrate is patterned by laser ablation to form structures for subsequent formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor device package, which may have one or more embedded double-sided dies therein. In certain embodiments, an insulating layer is formed over the substrate by laminating a pre-structured insulating film thereon. The insulating film may be pre-structured by laser ablation to form structures therein, followed by selective curing of sidewalls of the formed structures.