A package includes a substrate, a conductive layer on a first surface of the substrate forming a set of antennas, and a semiconductor die forming communication channels for the antennas, each of the communication channels being electrically coupled to the antennas by way of a redistribution layer that includes the substrate, the semiconductor die being mounted on either the first surface or an opposing second surface of the substrate. The package further includes a set of electrical contacts on the second surface of the substrate, the redistribution layer further coupling the set of electrical contacts to the semiconductor die. The package further includes a stiffening layer over the first surface of the substrate, the stiffening layer forming gaps over the antennas such that the antennas are on an outer surface of the package.

In some examples, a device comprises a substrate including a notch formed in a surface of the substrate and a semiconductor die positioned in the notch and including an electrochemical sensor on an active surface of the semiconductor die. The device also comprises a chemically inert member abutting the surface of the substrate and including an orifice in vertical alignment with the electrochemical sensor as a result of the semiconductor die being positioned in the notch. The device also comprises a compressed o-ring seal positioned between the chemically inert member and the active surface of the semiconductor die, the compressed o-ring seal circumscribing the electrochemical sensor.

An electronic device and a method of manufacturing an electronic device. As non-limiting examples, various aspects of this disclosure provide various methods of manufacturing electronic devices, and electronic devices manufactured thereby, that comprise utilizing metal studs to further set a semiconductor die into the encapsulant.

A weight optimized stiffener for use in a semiconductor device is disclosed herein. In one example, the stiffener is made of AlSiC for its weight and thermal properties. An O-ring provides sealing between a top surface of the stiffener and a component of the semiconductor device and adhesive provides sealing between a bottom surface of the stiffener and another component of the semiconductor device. The stiffener provides warpage control for a lidless package while enabling direct liquid cooling of a chip or substrate.

A weight optimized stiffener for use in a semiconductor device is disclosed herein. In one example, the stiffener is made of AlSiC for its weight and thermal properties. An O-ring provides sealing between a top surface of the stiffener and a component of the semiconductor device and adhesive provides sealing between a bottom surface of the stiffener and another component of the semiconductor device. The stiffener provides warpage control for a lidless package while enabling direct liquid cooling of a chip or substrate.

A semiconductor package assembly includes a die having a front surface and a back surface opposite to and parallel to the front surface. A first portion of a front surface of an interconnect die is coupled to a portion of the back surface of the die. The interconnect die includes a connectivity region that is coupled to one or more through-die vias in the die through the back surface of the die. A spacer component is coupled to a second portion of the front surface of the interconnect die. The spacer component includes conductive connections, with one or more of the conductive connections are coupled to the conductive pathways of the connectivity region of the interconnect die.

A device including a semiconductor package, a first passive device, a first barrier structure and a lid structure. The semiconductor package is disposed on a substrate. The first passive device is disposed on the substrate aside the semiconductor package. The first barrier structure is laterally surrounding the first passive device. The lid structure is disposed on the substrate. The first barrier structure is formed with a first sidewall located in between a sidewall of the semiconductor package and a first side surface of the first passive device, and formed with a second sidewall located in between a sidewall of the lid structure and a second side surface of the first passive device. The lengths of the first and second sidewalls are formed to be smaller than a length of the sidewall of the semiconductor package, and greater than a length of the first side surface.

A semiconductor structure includes a die structure. The die structure includes: a substrate; a first dielectric layer over the substrate; a first conductive structure within the first dielectric layer; a first edge protection layer on an edge surface of the first die structure; and a first insulating layer laterally adjacent to the first edge protection layer, the first edge protection layer between the first insulating layer and the edge surface of the first die structure.

Provided is an electronic device including a substrate, a first metal layer, an electronic component, a cover layer, and an adhesive layer. The first metal layer is formed on the substrate. The electronic component is disposed on the substrate and electrically connected to the first metal layer. The adhesive layer is adhered to the substrate and the cover layer.

A semiconductor package including one or more dam structures and the method of forming are provided. A semiconductor package may include an interposer, a semiconductor die bonded to a first side of the interposer, an encapsulant on the first side of the interposer encircling the semiconductor die, a substrate bonded to the a second side of the interposer, an underfill between the interposer and the substrate, and one or more of dam structures on the substrate. The one or more dam structures may be disposed adjacent respective corners of the interposer and may be in direct contact with the underfill. The coefficient of thermal expansion of the one or more of dam structures may be smaller than the coefficient of thermal expansion of the underfill.