Patent classifications
H10W76/60
THERMALLY ENHANCED EMBEDDED DIE PACKAGE
A method of fabricating an electronic device includes forming an embedded die frame having a cavity and a routing structure, a semiconductor die in the cavity with a gallium nitride layer on the routing structure, and a heat spreader having a thermally conductive insulator layer and a metal plate, the thermally conductive insulator layer having a first side that faces the embedded die frame and an opposite second side that faces away from the embedded die frame, with a portion of the first side of the thermally conductive insulator layer extending over a side of a silicon substrate of the semiconductor die, and the metal plate on the second side of the thermally conductive insulator layer.
SEMICONDUCTOR MODULE AND A METHOD FOR FORMING THE SAME
A semiconductor module comprises a metallic sheet comprising a first surface. The semiconductor module further comprises a semiconductor die coupled to the first surface of the metallic sheet. An electrically insulative housing comprises a circumferential frame, wherein the electrically insulative housing encloses the semiconductor die and at least a part of the first surface of the metallic sheet. Furthermore, a joining section of the circumferential frame is directly joined to the first surface of the metallic sheet, wherein an electrically inducible element is enclosed near the joining section of the circumferential frame.
WIRING BOARD, ELECTRONIC COMPONENT MOUNTING PACKAGE INCLUDING WIRING BOARD, AND ELECTRONIC MODULE
A wiring board includes a first insulating layer, a second insulating layer, a first ground conductor, and a first signal conductor. The first insulating layer includes a first upper surface and a first lower surface. The second insulating layer is positioned on the first insulating layer and includes a second upper surface and a second lower surface. The first ground conductor is positioned on the first lower surface and includes a first opening and a second opening. The first signal conductor includes a first line positioned on the first upper surface and a second line positioned on the second lower surface. The first line includes a first end portion and a first line portion. The second line includes a second end portion electrically connected to the first end portion, and a second line portion. The first opening is larger in area than the second opening in a planar view.
Power Electronics Device and Plug Connector Assembly Having an Electrically Insulative Compressible Body
A power electronics device includes one or more power semiconductor dies within a housing, a plurality of terminals electrically connected to the one or more power semiconductor dies, and a compressible body. Each terminal has a contact end exposed at a side of the housing. A first terminal is configured for a higher electric potential than other ones of the terminals. The compressible body is electrically insulative and disposed along at least one lateral side of the contact end of the first terminal. For an installed state of the power electronics device, the compressible body is configured to be under compression and span a gap between the side of the housing at which the contact end of the first terminal is exposed and a component to which the contact end of the first terminal is to be connected.
Thermal Dissipation System for Integrated Circuit Chips
A thermal dissipation system for an integrated circuit (IC) includes an IC disposed on a substrate and a heat sink including a body having a first surface including a first part coupled to a side of the IC opposite the substrate and a second part disposed away from the IC and positioned in spaced relation to the substrate. A set of legs support at least the second part of the body in spaced relation to the substrate. The set of legs may be part of the body or may be part of a carrier disposed between the second part of the first surface of the body and the substrate. The carrier includes an opening through which a portion of the substrate that includes the first part that is coupled to the side of the IC opposite the substrate extends.
CHIP PACKAGE STRUCTURE AND ELECTRONIC DEVICE
Embodiments of this application disclose a chip package structure and an electronic device. The chip package structure includes a substrate and a housing; a chip and a supporting member, disposed on a first surface of the substrate, where the supporting member is disposed around the chip, and both the chip and the supporting member are located in a cavity; a spraying module which is disposed on the housing; and a first sealing member which is disposed between the supporting member and the housing. In this way, heat may be dissipated for the chip in a liquid cooling manner, thereby improving heat dissipation performance of the chip. The sealing member is disposed between the supporting member and the housing along a radial direction, to seal a region outside the first surface of the substrate. In addition, this facilitates disassembly/assembly, and reduces pressure on the chip during mounting.
HEAT DISSIPATION STRUCTURE FOR INTEGRATED CIRCUIT PACKAGES
A package substrate according to the present disclosure includes a package substrate, a package component bonded to the package substrate and including a plurality of dies, a lid disposed over the package component and the package substrate, and a thermal interface material (TIM) layer sandwiched between the package component and the lid. The lid includes a plurality of heat spreader patterns that extend from a bottom surface of the lid into the TIM layer.
Semiconductor packages with thermal lid and methods of forming the same
Semiconductor three-dimensional integrated circuit packages and methods of forming the same are disclosed herein. A method includes bonding a semiconductor chip package to a substrate and depositing a thermal interface material on the semiconductor chip package. A thermal lid may be placed over and adhered to the semiconductor chip package by the thermal interface material. The thermal lid includes a wedge feature interfacing the thermal interface material. The thermal lid may be adhered to the semiconductor chip package by curing the thermal interface material.
Semiconductor module
A semiconductor module includes a semiconductor element, a case configured to house the semiconductor element, and a plurality of control terminal units. Each of the control terminal units includes at least one control terminal electrically connected to the semiconductor element, and a guide block constituted of a separate component from the case fixed integrally to the at least one control terminal. The at least one control terminal each includes a terminal pin part protruding from an outer wall surface of the case. Each of the guide blocks includes a guide pin part protruding from the outer wall surface of the case in a direction the same as the direction in which the terminal pin part protrudes. The guide blocks of the control terminal units are constituted of separate components.
Package assembly including liquid alloy thermal interface material (TIM) and seal ring around the liquid alloy TIM and methods of forming the same
A package assembly includes an interposer module on a package substrate, a liquid alloy thermal interface material (TIM) on the interposer module, a seal ring surrounding the liquid alloy TIM, and a package lid on the liquid alloy TIM and seal ring, wherein the seal ring, interposer module and package lid seal the liquid alloy TIM.