In one example, an electronic device comprises a substrate comprising a conductive structure and an inner side and an outer side, a first electronic component over the inner side of the substrate and coupled with the conductive structure, a lid over the substrate and the first electronic component and comprising a first hole in the lid, and a thermal interface material between the first electronic component and the lid. The thermal interface material is in the first hole. Other examples and related methods are also disclosed herein.

An electronic device may include a first die that may include a first set of die contacts. The electronic device may include a second die that may include a second set of die contacts. The electronic device may include a bridge interconnect that may include a first set of bridge contacts and may include a second set of bridge contacts. The first set of bridge contacts may be directly coupled to the first set of die contacts (e.g., with an interconnecting material, such as solder). The second set of bridge contacts may be directly coupled to the second set of die contacts (e.g., with solder). The bridge interconnect may help facilitate electrical communication between the first die and the second die.

In an embodiment, a package including: a redistribution structure including a first dielectric layer and a first conductive element disposed in the first dielectric layer; a first semiconductor device bonded to the redistribution structure, wherein the first semiconductor device includes a first corner; and an underfill disposed over the redistribution structure and including a first protrusion extending into the first dielectric layer of the redistribution structure, wherein the first protrusion of the underfill overlaps the first corner of the first semiconductor device in a plan view.

A package structure is provided. The package structure includes a chip structure having opposite surfaces with different widths. The chip structure has an inclined sidewall between the opposite surfaces. The package structure also includes a protective layer laterally surrounding the chip structure.

A method includes bonding a first plurality of device dies onto a wafer, wherein the wafer includes a second plurality of device dies, with each of the first plurality of device dies bonded to one of the second plurality of device dies. The wafer is then sawed to form a die stack, wherein the die stack includes a first device die from the first plurality of device dies and a second device die from the second plurality of device dies. The method further includes bonding the die stack over a package substrate.

A semiconductor package includes a package substrate including an upper surface layer including a first surface area having a first surface roughness, and a second surface area having a second surface roughness less than the first surface roughness, and an interposer module mounted on the upper surface layer of the package substrate in the second surface area. The semiconductor package may also include an interposer including an upper surface layer including a first surface area having a first surface roughness, and a second surface area having a second surface roughness less than the first surface roughness. The semiconductor package may also include an printed circuit board substrate including an upper surface layer including a first surface area having a first surface roughness, and a second surface area having a second surface roughness less than the first surface roughness.

A semiconductor device has a semiconductor wafer. A trench is formed through an active surface of the semiconductor wafer between a first semiconductor die and a second semiconductor die. An encapsulant is deposited in the trench. A back surface of the semiconductor wafer opposite the active surface is backgrinded using a rough grinder to expose the encapsulant. The back surface of the semiconductor wafer is backgrinded using a fine grinder. The fine grinder removes approximately 20 m of thickness from the semiconductor wafer. Back-end manufacturing is performed on the wafer after depositing the encapsulant and before backgrinding using the rough grinder.

A method of forming a semiconductor package includes forming, on a first semiconductor chip, a plurality of inner connection terminals and a preliminary underfill covering the plurality of inner connection terminals, stacking the first semiconductor chip on a lower structure such that the preliminary underfill is bonded between the first semiconductor chip and the lower structure, and curing the preliminary underfill using a laser bonding process, thereby forming a first underfill, and reflowing the plurality of inner connection terminals during a formation of the first underfill through the curing of the preliminary underfill.

Embodiments include packages and methods for forming packages which include interposers having a substrate made of a dielectric material. The interposers may also include a redistribution structure over the substrate which includes metallization patterns which are stitched together in a patterning process which includes multiple lateral overlapping patterning exposures.

A semiconductor device includes a dielectric interposer, a first RDL, a second RDL, and a plurality of conductive structures. The dielectric interposer has a first surface and a second surface opposite to the first surface. The first RDL is disposed over the first surface of the dielectric interposer. The second RDL is disposed over the second surface of the dielectric interposer. The conductive structures are disposed through the dielectric interposer and directly contact the dielectric interposer. The conductive structures are electrically connected to the first RDL and the second RDL. Each of the conductive structures has a tapered profile. A minimum width of each of the conductive structures is proximal to the first RDL, and a maximum width of each of the conductive structures is proximal to the second RDL.