A system includes: an inverter configured to convert DC power to AC power, wherein the inverter includes: a power module including: a first substrate, a second substrate including a source plane and a gate plane separated from the source plane by a full trench, the source plane including a step trench, and the gate plane including an electrical connection through the second substrate to a gate input connection of the power module, a semiconductor die disposed between the first substrate and the second substrate, the step trench formed in a portion of the source plane corresponding to an edge of the semiconductor die, and the semiconductor die including a gate connected to the gate plane, and a sinter element disposed between the semiconductor die and the second substrate to connect the semiconductor die to the second substrate; a battery; and a motor.

A semiconductor package includes a semiconductor element, a first insulating layer, a first wiring layer, a second insulating layer, and a second wiring layer. The first insulating layer covers the semiconductor element. The first wiring layer includes a first layer section. The first layer section covers the first insulating layer. The second insulating layer covers the first insulating layer and the first wiring layer. The second wiring layer is electrically connected to the semiconductor element through a second through hole and a third through hole. The second wiring layer includes a second layer section. The second layer section covers the second insulating layer. The second layer section of the second wiring layer has a portion overlying the first layer section of the first wiring layer with the second insulating layer interposed.

A semiconductor apparatus includes a substrate, a semiconductor device arranged on an upper surface of the substrate, a lead frame bonded to an upper surface of the semiconductor device via a bonding material, the lead frame having a first recess on an upper surface thereof, a wire connected to the first recess, and a resin that seals the substrate, the semiconductor device, the lead frame, and the wire.

A method of fabricating an electronic device includes forming an embedded die frame having a cavity and a routing structure, a semiconductor die in the cavity with a gallium nitride layer on the routing structure, and a heat spreader having a thermally conductive insulator layer and a metal plate, the thermally conductive insulator layer having a first side that faces the embedded die frame and an opposite second side that faces away from the embedded die frame, with a portion of the first side of the thermally conductive insulator layer extending over a side of a silicon substrate of the semiconductor die, and the metal plate on the second side of the thermally conductive insulator layer.

The invention relates to a metal-ceramic substrate, to an electronic component comprising a metal-ceramic substrate, and to a method for producing a metal-ceramic substrate. The metal-ceramic substrate comprises: a) a ceramic body which has a main extension plane, b) a metal layer which is connected to the ceramic body in a planar manner, the metal layer having a structuring region which comprises (i) partially solid material and (ii) partially non-solid material, and c) a contact area which is arranged on the metal layer and comprises silver, the structuring region having a geometry in a cross-section through the metal-ceramic substrate perpendicular to the main extension plane, the following requirement being met: S(BC.sub.solid)/S(BC.sub.total)>60%, wherein: S(BC.sub.total) represents the total length of the line between points B and C, and S(BC.sub.solid) represents the length of the line between points B and C that intersects the solid material.

A semiconductor device includes: an insulated circuit substrate including a base plate, a resin layer on the base plate, and a circuit pattern on the resin layer; a semiconductor chip that is rectangular and is bonded to the circuit pattern such that a side edge of the semiconductor chip is spaced inwardly from an outer peripheral edge of the circuit pattern by a predetermined distance; a case on the resin layer and surrounds the circuit pattern and the semiconductor chip; and a sealing material that covers the insulated circuit substrate and semiconductor chip and is surrounded by the case. The predetermined distance and thickness of the circuit pattern are greater than or equal to 0.1 of a length of one side of the semiconductor chip. A peripheral region of the case and a peripheral region of the resin layer are connected to each other via an adhesive layer.

A semiconductor package includes a substrate including a die pad, first and second discrete transistor dies mounted on the die pad, an encapsulant body that encapsulates the first and second discrete transistor dies, and a plurality of leads that are exposed from the encapsulant body, wherein the first and second discrete transistor dies are connected in parallel with one another by electrical interconnections that electrically connect common terminals of the first and second discrete transistor dies to one of the leads, and wherein at least one of the electrical interconnections has a balanced configuration that provides substantially identical electrical impedance as between the common terminals of the first and second discrete transistor dies and the lead to which they are connected.

A semiconductor device, including: a semiconductor substrate having a main surface; an interlayer insulating film provided on the main surface of the semiconductor substrate; a contact hole penetrating through the interlayer insulating film to reach the semiconductor substrate; a plug electrode embedded in the contact hole; a first barrier metal provided on the interlayer insulating film, the first barrier metal being apart from the plug electrode; and a front electrode provided on the first barrier metal and the plug electrode.

A semiconductor component has a circuit carrier with a first conductor layer, in which a first conductor path is formed. A first thyristor chip has, on its upper face, an anode contact and a gate contact and, on its lower face, a cathode contact placed for electrical connection on the first conductor path. A second thyristor chip has, on its upper face, a cathode contact and a gate contact and, on its lower face, an anode contact placed for electrical connection on the first conductor path. At least one electrically conductive connection element connects the anode contact of the first thyristor chip to the cathode contact of the second thyristor chip. The first conductor path thus establishes an electrical connection between the cathode contact of the first thyristor chip and the anode contact of the second thyristor chip.

A semiconductor package may include a first redistribution substrate, a first semiconductor device on the first redistribution substrate, through posts on the first redistribution substrate so as to be adjacent to the first semiconductor device, a second redistribution substrate on the first semiconductor device and the through posts, a second semiconductor device on the second redistribution substrate, and a heat-dissipating block on the second redistribution substrate so as to be adjacent to the second semiconductor device. The heat-dissipating block may include a recessed portion at a center portion of a lower surface thereof. The heat-dissipating block may be coupled to the second redistribution substrate through an adhesive layer filling the recessed portion.