A power semiconductor module arrangement comprises a substrate comprising a dielectric insulation layer, and a first metallization layer attached to the dielectric insulation layer, at least one semiconductor body mounted on the first metallization layer, and a first layer comprising an encapsulant, the first layer being arranged on the substrate and covering the first metallization layer the at least one semiconductor body, wherein the first layer is configured to release liquid or oil at temperatures exceeding a defined threshold temperature.

A thermal substrate includes a multilayer film, a first conductive layer adhered to the first outer layer of the multilayer film and a second conductive layer adhered to the second outer layer of the multilayer film. The multilayer film includes a first outer layer including a first thermoplastic polyimide, a core layer including a polyimide and a second outer layer including a second thermoplastic polyimide. The multilayer film has a total thickness in a range of from 5 to 150 m, and the first outer layer, the core layer and the second outer layer each include a thermally conductive filler. The first conductive layer and the second conductive layer each have a thickness in a range of from 250 to 3000 m.

An electronic device includes: an insulating substrate including an obverse surface facing a thickness direction; a wiring portion formed on the substrate obverse surface and made of a conductive material; a lead frame arranged on the substrate obverse surface; a first and a second semiconductor elements electrically connected to the lead frame; and a first control unit electrically connected to the wiring portion to operate the first semiconductor element as a first upper arm and operate the second semiconductor element as a first lower arm. The lead frame includes a first pad portion to which the first semiconductor element is joined and a second pad portion to which the second semiconductor element is joined. The first and second pad portions are spaced apart from the wiring portion and arranged in a first direction with a first separation region sandwiched therebetween, where the first direction is orthogonal to the thickness direction. The first control unit is spaced apart from the lead frame as viewed in the thickness direction, while overlapping with the first separation region as viewed in a second direction orthogonal to the thickness direction and the first direction.

According to an embodiment, a ceramic copper circuit board in which the reliability of bonding with a bonding layer is improved is provided, and an insulating circuit board includes an insulating substrate and a conductor part bonded to at least one surface of the insulating substrate. In XPS analysis of a nitrogen amount at the conductor part surface, an average value of the nitrogen amount at any three locations is within a range of not less than 0 at % and not more than 50 at %. In XPS analysis of the oxygen amount at the conductor part surface, the average value of the three locations is favorably within the range of not less than 3 at % and not more than 30 at %. The ratio of the nitrogen amount to the oxygen amount is favorably not less than 0 and not more than 5.

A power module includes: a first substrate having an outer surface and an inner surface; a semiconductor die coupled to the inner surface of the first substrate; a second substrate having an outer surface and an inner surface, the semiconductor die being coupled to the inner surface of the second substrate; and a flex circuit coupled to the semiconductor die.

A power electronics module, having a DBC PCB having power semiconductors arranged thereon, and a multilayered leadframe including at least two separate subframes. No power or control routing takes place on the PCB. A region of the load source subregion is arranged between the PCB and the gate source and kelvin source subregion and is in electrical contact with the power semiconductors, and an adjoining region is located outside the PCB. A region of the drain source subregion is in electrical contact with a drain terminal on the PCB, and an adjoining region is located outside the PCB. The gate source subregion and the kelvin source subregion have a region above the load source subregion at which said subregions are in electrical contact with the power semiconductors and have an adjoining region outside the PCB which is opposite the drain source subregion and has pins bent above the PCB.

A power electronics module, having a PCB having power semiconductors arranged on connecting regions of an uppermost layer of said PCB, wherein the PCB has a preset dimension to arrange a preset maximum number of power semiconductors thereon. A lead frame arranged above the power semiconductors provides three-dimensional power and control routing, and includes a drain-source connection to connect to a drain-source contact of the PCB, and a load-source connection opposite the drain-source connection via the power semiconductors that is formed from a plurality of subregions, each of which can be brought into electrical contact with the power semiconductors, and a gate- and kelvin-source terminal, which are arranged above the load-source connection and have been brought into electrical contact with the power semiconductors. At least one dummy chip consisting of an electrically nonconductive material is arranged on each of the connecting regions that are not populated by power semiconductors.

A semiconductor module includes a heat sink configured to conduct a cooling fluid in a cooling-fluid flow direction. A first semiconductor assembly is arranged on a surface of the heat sink. The first semiconductor assembly includes a first substrate having a first dielectric material layer, and a first semiconductor element connected to the first substrate. A second semiconductor assembly is arranged on the surface of the heat sink and closest to a downstream end of the heat sink. The second semiconductor assembly includes a second substrate having a second dielectric material layer, and a second semiconductor element connected to the second substrate. The second dielectric material layer has a thermal conductivity which is higher than a thermal conductivity of the first dielectric material layer.

A multilayer composite thermally-conductive sheet, a preparation method therefor and use thereof are provided. The multilayer composite thermally-conductive sheet includes a metal foil, two transition layers provided on two opposite side surfaces of the metal foil, and two low-temperature alloy layers respectively provided on surfaces of the transition layers facing away from the metal foil, wherein the metal foil is made from at least one of silver, copper, zinc, and platinum, the transition layers are made from either indium or tin, the transition layers have a thickness of 5-13 m; and a melting point of the low-temperature alloy layers is 30-300 C.

A housing for a semiconductor module includes sidewalls extending horizontally around an internal volume of the housing and a groove formed in a bottom surface of the sidewalls and extending along a circumference of the housing. The bottom surface of the sidewalls is configured to be attached to a substrate or a base plate. The groove extends into the sidewalls of the housing in a vertical direction. The groove includes a first section having a constant width in a horizontal direction and beveled edges between the first section and the bottom surface of the sidewalls. The beveled edges define a second section arranged between the first section and the bottom surface of the sidewalls, and having a varying width in the horizontal direction. The width of the second section gradually increases from the first section towards the bottom surface of the sidewalls.