A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, selectively exposing the photoresist layer to an EUV radiation, and developing the selectively exposed photoresist layer. The photoresist layer has a composition including a solvent and a photo-active compound dissolved in the solvent and composed of a molecular cluster compound incorporating hexameric tin and two chloro ligands.

The present disclosure provides a semiconductor structure and a method of manufacturing a semiconductor structure. The semiconductor structure includes a first set of photoresist structures, a second photoresist structure, and a third photoresist structure. The first set of photoresist structures is disposed along a first orientation. The second photoresist structure is disposed non-parallel to the first orientation. The third photoresist structure is disposed non-parallel to the first orientation. The second photoresist structure and the third photoresist structure contact at least one of the first set of photoresist structures.

The functional photoresist for patterning a nanoparticle thin film including nanoparticles on a substate includes: a photoactive compound (PAC); and a functional ligand that is bound to surfaces of the nanoparticles and controls physical properties of the nanoparticles.

A pellicle assembly includes a pellicle membrane with a nanotube layer formed from nanotubes having a minimum length of 1,000 m. The pellicle membrane can be formed with multiple layers and has a combination of high transmittance, low deflection, and small pore size. A conformal coating may applied to an outer surface of the pellicle membrane. The conformal coating is intended to protect the pellicle membrane from damage that can occur due to heat and hydrogen plasma created during EUV exposure.

A method includes forming a first photoresist layer on a dielectric layer; performing a first light-exposure process on the first photoresist layer using a first photolithography mask, wherein during the first light-exposure process, a first region the first photoresist layer is blocked from being exposed, a second region of the first photoresist layer is exposed, and a third region of the first photoresist layer is exposed, wherein the second region encircles the first region and the third region encircles the second region; performing a second light-exposure process on the first photoresist layer using a second photolithography mask, wherein during the second light-exposure process, the first region of the first photoresist layer is exposed, the second region of the first photoresist layer is exposed, and the third region of the first photoresist layer is blocked from being exposed; and developing the first photoresist layer.

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate. A portion of the photoresist layer is exposed, using a mask, to a radiation. The photoresist layer is treated, using a basic gas. The photoresist layer is developed to form a patterned photoresist layer over the substrate.

In a method executed in an exposure apparatus, a focus control effective region and a focus control exclusion region are set based on an exposure map and a chip area layout within an exposure area. Focus-leveling data are measured over a wafer. A photo resist layer on the wafer is exposed with an exposure light. When a chip area of a plurality of chip areas of the exposure area is located within an effective region of a wafer, the chip area is included in the focus control effective region, and when a part of or all of a chip area of the plurality of chip areas is located on or outside a periphery of the effective region of the wafer, the chip area is included in the focus control exclusion region In the exposing, a focus-leveling is controlled by using the focus-leveling data measured at the focus control effective region.

A method is for producing a master template with variable height features for imprint lithography on a device substrate includes providing a layer stack comprising a substrate, an etch stop layer on the substrate, and a pattern layer on the etch stop layer. The method involves creating height gradation in the pattern layer to obtain a height graded pattern layer, forming the master template by providing a pattern comprising a plurality of features into the height graded pattern layer. This method enables the production of features with varying heights, which can be particularly useful in applications such as optical devices where such features may influence the functionality and efficiency of the device.

A thickening composition includes a polymer (A) comprising a repeating unit (A1) represented by the formula (a1) and a solvent (B), all of which are defined herein.

A cleaning solution includes a solvent having Hansen solubility parameters: 25>.sub.d>13, 25>.sub.p>3, 30>.sub.h>4; an acid having an acid dissociation constant pKa: 11<pKa<4, or a base having pKa of 40>pKa>9.5; and a surfactant. The surfactant is an ionic or non-ionic surfactant, selected from ##STR00001##
R is substituted or unsubstituted aliphatic, alicyclic, or aromatic group, and non-ionic surfactant has A-X or A-X-A-X structure, where A is unsubstituted or substituted with oxygen or halogen, branched or unbranched, cyclic or non-cyclic, saturated C2-C100 aliphatic or aromatic group, X includes polar functional groups selected from OH, O, S, P, P(O.sub.2), C(O)SH, C(O)OH, C(O)OR, O, N, C(O) NH, SO.sub.2OH, SO.sub.2SH, SOH, SO.sub.2, CO, CN, SO, CON, NH, SO.sub.3NH, and SO.sub.2NH.