A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.

A manufacturing method of a semiconductor structure including following steps is provided. A patterned photoresist layer is formed on a substrate by a lithography process. The patterned photoresist layer includes a first opening and a second opening. The first opening includes a first inclined sidewall. An etching process is performed on the substrate by using the patterned photoresist layer as a mask to form a third opening corresponding to the first opening and a fourth opening corresponding to the second opening in the substrate. The third opening includes a second inclined sidewall. A conductive layer is formed on the substrate. The conductive layer fills the third opening and the fourth opening. A portion of the conductive layer is removed by using the conductive layer located in the third opening as a stop layer to form a mark in the third opening and a TSV in the fourth opening.

Technologies are described for methods and systems effective for etching nanostructures in a substrate. The methods may comprise depositing a patterned block copolymer on the substrate. The methods may comprise applying a precursor to the patterned block copolymer to generate an infiltrated block copolymer. The precursor may infiltrate into the first polymer block domain and generate a material. The methods may comprise applying a removal agent effective to remove the polymer block domains to the infiltrated block copolymer to generate a pattern of the material. The methods may comprise etching the substrate. The pattern of the material may mask the substrate to pattern the etching. The etching may be performed under conditions to produce nanostructures in the substrate. The methods may comprise removing the pattern of the material and coating the nanostructures and the surface of the substrate with a hydrophobic coating.

An upper layer film-forming composition exhibits good solubility in hydrophobic solvents and can bring about vertical alignment of a block copolymer without dissolution, swelling or the like of a layer containing the block copolymer formed on a substrate. This upper layer film-forming composition is used for phase separation of a layer containing a block copolymer formed on a substrate, and contains: (A) a copolymer containing a unit structure derived from a maleimide structure (a) and a unit structure derived from a styrene structure; and (B) as a solvent, a non-aromatic hydrocarbon compound that is a liquid at normal temperature and pressure.

Methods of forming a silicon hardmask are disclosed. In one example, a method may include forming a silicon mask over a device layer, forming a carbon mask over the silicon mask, and forming an opening through the carbon mask. The method may further include forming an oxide layer within the opening by performing an ion implantation process to an upper surface of the silicon mask.

According to one embodiment, a semiconductor manufacturing device includes a processing chamber that accommodates a substrate, a support that supports the substrate, a nozzle that supplies a resist material onto the substrate, a first temperature regulator, and a second temperature regulator. The first temperature regulator is attached to the support and the second temperature regulator is attached to the processing chamber, At least one of the first temperature regulator or the second temperature regulator forms a resist film from the resist material by regulating a temperature of the resist material.

A method of manufacturing a semiconductor structure includes forming bit line structures on a substrate; forming a dielectric layer on the substrate and between the bit line structures; forming a layer stack including a plasma treated oxygen-rich ARC layer and a silicon-rich ARC layer on the dielectric layer; forming a patterned mask layer including a mask feature and an opening on the layer stack, the opening has a first width smaller than a pitch between adjacent two of the bit line structures; trimming the patterned mask layer to enlarge the opening such that the opening has a second width greater than the first width; patterning the layer stack by using patterned mask layer as a mask after trimming the patterned mask layer; and etching the substrate to form a contact hole between the bit line structures by using the patterned layer stack as a hard mask.

The present application relates to a semiconductor fin structure cut process. The process includes: providing a semiconductor substrate and forming a plurality of fin structures on the semiconductor substrate, a gap being formed between every two adjacent fin structures; depositing a first dielectric layer, the first dielectric layer being filled in the gaps so that all fin structures are connected into a whole to form a semiconductor with fins; forming a plurality of pattern layer strips on the semiconductor with fins, a groove being formed between every two adjacent pattern layer strips, the fin structures closest to each pattern layer strip in the semiconductor with fins being necessary fin structures, attaching mask strips onto side surfaces of each pattern layer strip, the mask strips covering the necessary fin structures; etching the semiconductor with fins so that the unnecessary fin structures not covered by the mask strips are truncated.

A composition for forming a protective film using a polymer having an imide group: cured under a film-forming condition in air and an inert gas; forming a protective film having excellent heat resistance, embedding and planarization ability for a pattern formed on a substrate, and good adhesiveness to the substrate; and forming a protective film having excellent resistance against an alkaline aqueous hydrogen peroxide. A composition for forming a protective film against alkaline aqueous hydrogen peroxide, including: (A) a polymer having a repeating unit represented by general formula (1A) having at least one or more fluorine atoms and at least one or more hydroxy groups, a terminal group is any one of the following general formulae (1B) and (1C); and organic solvent, wherein R.sub.1 represents any one group represented by the following formula (1D), and two or more kinds of R.sub.1 are optionally used in combination. ##STR00001##

A method for forming fins includes forming a three-color hardmask fin pattern on a fin base layer. The three-color hardmask fin pattern includes hardmask fins of three mutually selectively etchable compositions. Some of the fins of the first color are etched away with a selective etch that does not remove fins of a second color or a third color and that leaves at least one fin of the first color behind. The fins of the second color are etched away. Fins are etched into the fin base layer by anisotropically etching around remaining fins of the first color and fins of the third color.