The technology of this application relates to a packaging module and a packaging method therefor, and an electronic device. The packaging module includes at least two device groups and a shielding structure configured to shield the at least two device groups. The shielding structure includes a partition structure configured to perform electromagnetic isolation between every two adjacent device groups. The partition structure includes a plurality of conductive pillars and conductive adhesive, and a conductivity of the conductive pillar is greater than a conductivity of the conductive adhesive. The plurality of conductive pillars are arranged at intervals and are electrically connected to a ground layer of a substrate, the conductive adhesive fills a gap between any adjacent conductive pillars, and any adjacent conductive pillars are electrically connected by using the conductive adhesive.

A semiconductor package structure includes a substrate with a substrate surface, a processing device electrically coupled to the substrate surface, one or more radio frequency integrated circuits (RFIC(s)) electrically coupled to the substrate surface, and a shield plate. The shield plate is disposed between the one or more RFIC(s) and the processing device and is configured to couple the one or more RFIC(s) to a package ground via one or more conductors. The package ground has a ground voltage associated with the semiconductor package structure.

An integrated circuit device, having a first number of terminals, and a first plurality of functional circuits including a second number of functional circuits requiring access to the terminals in the first number of terminals, where the second number is greater than the first number, includes a second plurality of functional circuits from among the first plurality of functional circuits, the second plurality of functional circuits sharing access to a shared terminal among the first number of terminals, and a respective isolation circuit between the shared terminal among the first number of terminals and each respective functional circuit in the second plurality of functional circuits, the respective isolation circuit being configured to prevent coupling of noise from one respective functional circuit in the second plurality of functional circuits to another respective functional circuit in the second plurality of functional circuits via the shared terminal.

In a method of manufacturing a semiconductor package, at least one conductive wire is formed on a substrate in a wire bonding process, a ball end of the conductive wire is located above the substrate, a molding material is provided to cover the conductive wire except the ball end, and an EMI shielding layer is formed on the molding material to connect to the ball end. Owing to the ball end is exposed on the molding material, connection area of the EMI shielding layer to the conductive wire is increased to improve connection strength and reliability between the EMI shielding layer and the conductive wire.

In a method of manufacturing a semiconductor package, at least one conductive wire is formed on a substrate in a wire bonding process, a ball end of the conductive wire is located above the substrate, a molding material is provided to cover the conductive wire except the ball end, and an EMI shielding layer is formed on the molding material to connect to the ball end. Owing to the ball end is exposed on the molding material, connection area of the EMI shielding layer to the conductive wire is increased to improve connection strength and reliability between the EMI shielding layer and the conductive wire.

A possible benefit of the present disclosure is to further improve a heat dissipation property of an electronic component. A high-frequency module includes a mounting substrate, a filter (for example, a transmission filter), a resin layer, a shielding layer, and a metal member. The resin layer covers at least a portion of an outer peripheral surface (for example, an outer peripheral surface) of the filter. The shielding layer covers at least a portion of the resin layer. The metal member is disposed at a first principal surface of the mounting substrate. The metal member is connected to a surface of the filter on the opposite side from the mounting substrate, the shielding layer, and the first principal surface of the mounting substrate.

A semiconductor device has a first semiconductor package, second semiconductor package, and RDL. The first semiconductor package is disposed over a first surface of the RDL and the second semiconductor package is disposed over a second surface of the RDL opposite the first surface of the RDL. A carrier is initially disposed over the second surface of the RDL and removed after disposing the first semiconductor package over the first surface of the RDL. The first semiconductor package has a substrate, plurality of conductive pillars formed over the substrate, electrical component disposed over the substrate, and encapsulant deposited around the conductive pillars and electrical component. A shielding frame can be disposed around the electrical component. An antenna can be disposed over the first semiconductor package. A portion of the encapsulant is removed to planarize a surface of the encapsulant and expose the conductive pillars.

A semiconductor structure includes an interposer including redistribution wiring interconnects and redistribution insulating layers; a first semiconductor die attached to the interposer through a first array of solder material portions; and a second semiconductor die attached to the interposer through a second array of solder material portions. The interposer includes at least one inductor structure located between an area of the first array of solder material portions and an area of the second array of solder material portions in a plan view and laterally encloses a respective area in the plan view.

A semiconductor structure includes an interposer including redistribution wiring interconnects and redistribution insulating layers; a first semiconductor die attached to the interposer through a first array of solder material portions; and a second semiconductor die attached to the interposer through a second array of solder material portions. The interposer includes at least one inductor structure located between an area of the first array of solder material portions and an area of the second array of solder material portions in a plan view and laterally encloses a respective area in the plan view.

A power semiconductor module includes a power semiconductor element, a first power line portion and a second power line portion respectively electrically connected to a first electrode and a second electrode of the power semiconductor element, a heat dissipation plate capable of dissipating heat from the power semiconductor element, a sensor element mounted on a front surface of the heat dissipation plate, and a first sensor line portion and a second sensor line portion electrically connected to the sensor element. The heat dissipation plate has at least one through-hole passing through between the front surface and a rear surface. The first sensor line portion and the second sensor line portion are drawn out to a region on the rear surface of the heat dissipation plate through the through-hole.