Patent classifications
H10P76/405
METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE USING MULTI-LAYER HARD MASK
The present disclosure provides a method of manufacturing a semiconductor structure. A substrate is provided. A multi-layer structure is formed over the substrate, wherein the multi-layer structure includes a semiconductive material layer and an oxide layer over the semiconductive material layer. The oxide layer is patterned to form a first patterned layer. A second patterned layer is formed on the semiconductive material layer and alternately arranged with the first patterned layer. A first etching operation is performed on the substrate using a comprehensive pattern of the first patterned layer and the second patterned layer.
Method for manufacturing semiconductor device and patterning method
A method for manufacturing a semiconductor device is disclosed. The method includes forming a mask layer containing a first metal and a first halogen on a film to be processed. The method includes patterning the mask layer. The method includes performing a treatment on the mask layer to decrease the concentration of the first halogen. The method includes processing the film using the treated mask layer as a mask.
Etching method, etching apparatus, manufacturing method of semiconductor device, and manufacturing method of template
An example of an etching method according to the present disclosure, includes: performing a first process which includes forming a first layer containing halogen or holding the substrate in a gas atmosphere containing halogen; and performing a second process which includes removing a portion of the first layer and a portion of the substrate under the portion of the first layer by supplying the portion of the first layer with ions sourced from a solid material.
Multiple patterning with selective mandrel formation
A method of forming a device includes forming a patterned resist layer over a substrate using an extreme ultraviolet (EUV) lithography process. The method includes forming a mandrel in a plasma processing chamber by selectively depositing a mandrel material over the patterned resist layer, the mandrel including the patterned resist layer and the mandrel material.
Pellicle for an EUV lithography mask and a method of manufacturing thereof
A pellicle for a reflective photo mask includes a frame, a core layer having a front surface and a rear surface, and disposed over the frame, a first capping layer disposed on the front surface of the core layer, an anti-reflection layer disposed on the first capping layer, a barrier layer disposed on the anti-reflection layer, and a heat emissive layer disposed on the barrier layer.
EXTREME ULTRAVIOLET LITHOGRAPHY PATTERNING METHOD
A method for fabricating a semiconductor device is described that includes forming a base layer over a top layer of a substrate, the base layer includes a silicon based dielectric having a thickness less than or equal to 5 nm and greater than or equal to 0.5 nm; forming a photoresist layer over the base layer, the photoresist including a first side and an opposite second side; exposing a first portion of the photoresist layer to a pattern of extreme ultraviolet (EUV) radiation from the first side; exposing a second portion of the photoresist layer with a pattern of electron flux from the second side, the electron flux being directed into the photoresist layer from the base layer in response to the EUV radiation; developing the exposed photoresist layer to form a patterned photoresist layer; and transferring the pattern of the patterned photoresist layer to the base layer and the top layer.
Semiconductor memory device manufacturing method
A semiconductor memory device manufacturing method includes the following steps. A bit line structure is formed in a memory array area of a substrate. A gate structure is formed in a periphery area of the substrate. A dielectric layer is formed over the bit line structure and the gate structure. A lower hard mask layer is formed over the dielectric layer. An etch process diagnostic signal layer is formed over the lower hard mask layer. An upper hard mask layer is formed over the etch process diagnostic signal layer. A main etching step is performed to form a first via hole towards the bit line structure and a second via hole towards the gate structure until the upper hard mask layer is removed to expose the etch process diagnostic signal layer.
Composition for forming protective film against alkaline aqueous hydrogen peroxide, substrate for producing semiconductor apparatus, method for forming protective film, and method for forming pattern
A composition for forming a protective film using a polymer having an imide group: cured under a film-forming condition in air and an inert gas; forming a protective film having excellent heat resistance, embedding and planarization ability for a pattern formed on a substrate, and good adhesiveness to the substrate; and forming a protective film having excellent resistance against an alkaline aqueous hydrogen peroxide. A composition for forming a protective film against alkaline aqueous hydrogen peroxide, including: (A) a polymer having a repeating unit represented by general formula (1A) having at least one or more fluorine atoms and at least one or more hydroxy groups, a terminal group is any one of the following general formulae (1B) and (1C); and organic solvent, wherein R.sub.1 represents any one group represented by the following formula (1D), and two or more kinds of R.sub.1 are optionally used in combination. ##STR00001##
Method of etching a semiconductor device by etching initial mask structures at a region having an extension direction different from the extension direction of the initial mask structures
A semiconductor structure and a method for fabricating the semiconductor structure are provided in the present disclosure. The method includes providing a substrate, wherein the substrate includes a plurality of first regions to-be-etched extending along a first direction; a first region to-be-etched includes a central region and an edge region adjacent to each of two sides of the central region; and a material layer to-be-etched is on the substrate; forming a plurality of discrete initial mask structures on the material layer to-be-etched; etching initial mask structures at the edge region till a surface of the material layer to-be-etched is exposed to form a plurality of mask structures; using the plurality of mask structures as a mask, etching the material layer to-be-etched to form a plurality of discrete layers to-be-etched; and removing layers to-be-etched at the central region till a surface of the substrate is exposed.
Composition for forming resist underlying film
R.sup.1.sub.aR.sup.2.sub.bSi(R.sup.3).sub.4-(a+b)(1) A composition for a silicon-containing resist underlying film and for forming a resist underlying film that can be removed by a conventional method employing dry etching, but also by a method employing wet etching using a chemical liquid in a step for processing a semiconductor substrate or the like; and a composition for forming a resist underlying film for lithography and for forming a resist underlying film that has excellent storage stability and produces less residue in a dry etching step. A composition for forming a resist underlying film, the composition including a hydrolysis condensate of a hydrolysable silane mixture containing an alkyltrialkoxy silane and a hydrolysable silane of formula (1), wherein the contained amount of the alkyltrialkoxy silane in the mixture is 0 mol % or more but less than 40 mol % with respect to the total amount by mole of all of the hydrolysable silane contained in the mixture.