Patent classifications
H10P50/242
Etching method, plasma processing apparatus, and processing system
An etching method includes: providing a substrate having a film and a patterned mask on the film; forming a silicon-containing layer including silicon, carbon, and nitrogen on the substrate using a precursor gas containing silicon; and performing a plasma etching on the film. The substrate is placed under a depressurized environment for a time period from a start time point of the step of forming the silicon-containing layer on the substrate to an end time point of the step of performing the plasma etching on the film.
EDGE FIN TRIM PROCESS
Semiconductor structures and methods are provided. In one embodiment, a method of the present disclosure includes forming a plurality of semiconductor fins over a substrate, after the forming of the plurality of semiconductor fins, removing an outer semiconductor fin of the plurality of semiconductor fins, and forming a gate structure over the plurality of semiconductor fins. The plurality of semiconductor fins include more than 3 semiconductor fins and the removing recesses a portion of the substrate directly under the outer semiconductor fin.
ETCHING BY ELECTRON ENHANCED PROCESSES WITH POSITIVE SUBSTRATE VOLTAGE
A method for etching a thin film includes conducting electron-enhanced chemical vapor etching with at least one reactive background gas and electrons to etch a thin film on a substrate with a positive substrate voltage. In an embodiment, the method is a method for etching a silicon thin film, including conducting electron-enhanced chemical vapor etching with at least one reactive background gas and electrons to etch a silicon thin film on a substrate with a positive substrate voltage.
METHOD OF PLASMA DICING A SEMICONDUCTOR WAFER
Method of plasma dicing a semiconductor wafer. The method includes a step of providing a semiconductor wafer comprising a main silicon layer and a top silicon oxide layer covered with an organic soft mask. The mask defines a plurality of scribe line regions to be etched. The method includes a step of plasma etching to remove the top silicon oxide layer in the scribe line regions to expose the main silicon layer. The plasma etching is performed using an etch chemistry having gaseous SF.sub.6 gas mixed with gaseous Ar. The method includes a step of plasma etching to remove the main silicon layer in the scribe line regions to provide a plurality of individual semiconductor die.
DIRECTIONAL SELECTIVE DEPOSITION
Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is seated. A bias power may be applied to the substrate support from a bias power source. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include etching the flowable film from a sidewall of the feature within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining flowable film within the feature defined within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor.
METHOD OF CONTROLLING A PATTERNING PROCESS, DEVICE MANUFACTURING METHOD
Methods of controlling a patterning process are disclosed. In one arrangement, tilt data resulting from a measurement of tilt in an etching path through a target layer of a structure on a substrate is obtained. The tilt represents a deviation in a direction of the etching path from a perpendicular to the plane of the target layer. The tilt data is used to control a patterning process used to form a pattern in a further layer.
FinFET Circuit Devices With Well Isolation
A method includes receiving a structure that includes a substrate including a first well region having a first dopant type and a second well region having a second dopant type that is opposite to the first dopant type; and fins extending above the substrate. The method further includes forming a patterned etch mask on the structure, wherein the patterned etch mask provides an opening that is directly above a first fin of the fins, wherein the first fin is directly above the first well region. The method further includes etching the structure through the patterned etch mask, wherein the etching removes the first fin and forms a recess in the substrate that spans from the first well region into the second well region; and forming a dielectric material between remaining portions of the fins and within the recess.
HARD MASK INCLUDING AMORPHOUS BORON NITRIDE FILM AND METHOD OF FABRICATING THE HARD MASK, AND PATTERNING METHOD USING THE HARD MASK
Provided are a hard mask including an amorphous boron nitride film and a method of fabricating the hard mask, and a patterning method using the hard mask. The hard mask is provided on a substrate and used for a process of patterning the substrate, and the hard mask includes an amorphous boron nitride film.
MEMBER IN A SEMICONDUCTOR MANUFACTURING APPARATUS AND MEMBER MANUFACTURING METHOD
A member used in a semiconductor manufacturing apparatus includes a first member, a second member, and a sealing layer disposed between the first member and the second member. The first member has a plurality of first openings, and the second member has a plurality of second openings respectively corresponding to the plurality of first openings. The sealing layer has a plurality of through holes respectively corresponding to at least two first openings among the plurality of first openings. The at least two first openings respectively communicate with at least two corresponding second openings via the plurality of through holes.
SUBSTRATE PROCESSING INCLUDING INITIAL ETCHING AND FAST ETCHING, AND RELATED METHODS, APPARATUS, SYSTEMS, AND CHAMBERS
Embodiments described herein generally relate to semiconductor device fabrication, and more particularly, to systems and methods that include initial etching and fast etching. In one or more embodiments, a method of substrate processing includes etching a layer of a substrate using a first pressure and a first composition including hydrogen chloride. The etching includes flowing the first composition for a first time period and at a first flow rate. The method includes etching the layer using a second pressure and a second composition including chlorine (Cl2) gas, and the etching includes flowing the second composition for a second time period less than the first time period and at a second flow rate less than the first flow rate. The second time period is a time ratio of the first time period, and the time ratio is 1:15 or less.