A laminate debonding method includes producing a laminate by joining a first substrate formed of a semiconductor-forming substrate to a second substrate formed of a support substrate which allows passage of infrared laser light, by the mediation of a first adhesive layer provided on the first substrate and a second adhesive layer provided on the second substrate, wherein the first adhesive layer is obtained by curing an adhesive (A) containing a component which is cured through hydrosilylation, and the second adhesive layer is obtained by use of an adhesive (B) formed of a polymer adhesive having an aromatic ring in at least one of a main chain and a side chain and which allows passage of infrared laser light; and irradiating the laminate with infrared laser light from a second substrate side for debonding the second substrate at the interface between the first and second adhesive layers.

A temporary fixation substrate, peeled from a predetermined object to be fixed after once the predetermined object to be fixed is temporarily fixed to one main surface thereof, includes: a thin region being an annular region having a predetermined width from a lateral end; and a first thickness-reduced portion having been recessed from the one main surface on a side of the one main surface in the thin region, wherein a thickness in the thin region is smaller than a thickness in a region other than the thin region, and a difference between a thickness at the lateral end and the thickness in the region other than the thin region is 1 m to 5 m.

An adhesive tape sheet includes an adhesive film including a first region attached to a semiconductor structure and vertically overlapping an edge of the semiconductor structure, and a second region adjacent to the first region. The adhesive film includes a non-patterned portion and a plurality of pattern portions defined by incision portions. A portion of the plurality of pattern portions include an open portion connected to the non-patterned portion in a first direction, and an extension portion having at least a portion extending from the open portion in a second direction opposite to the first direction and defined by the incision portions. A first group of the plurality of pattern portions are disposed on the first region and a second group of the plurality of pattern portions are disposed on the second region. A first density of the first group and a second density of the second group are different.

An element transfer device includes a support substrate holding part that holds a support substrate on which an element is supported via an adhesive layer, a laser light irradiation unit that is disposed on a side opposite to a surface on which the element is supported by the support substrate and irradiates laser light toward the support substrate, and a control unit that controls an irradiation position of the laser light irradiated from the laser light irradiation unit. An area of a spot area of the laser light is smaller than an area of a surface of the element supported by the support substrate. The control unit controls the irradiation position of the laser light such that the laser light is irradiated from one end side of the element to the other end side while moving relative to the support substrate.

Methods of making a semiconductor device assembly are provided. The methods can comprise providing a first semiconductor device having a first dielectric material at a first surface, providing a carrier wafer having a second dielectric material at a second surface, and forming a dielectric-dielectric bond between the first dielectric material and the second dielectric material. At least one of the first surface and the second surface includes a region of hydrophobic material electrically isolated from any circuitry of the first semiconductor device and configured to have a reduced bonding strength to a facing region relative to the dielectric-dielectric bond. The method can further include stacking one or more second semiconductor devices over the first semiconductor device to form the semiconductor device assembly, and removing the semiconductor device assembly from the carrier wafer.

A manufacturing method for a semiconductor device includes a preparation step of preparing a wafer that has a first surface on one side and a second surface on the other side, a first supporting step of supporting the wafer from the first surface side by a first member of a plate shape, a thinning step of thinning the wafer in a state where the wafer is supported by the first member, a second supporting step of supporting the wafer from a peripheral edge portion side of the second surface by a second member of a plate shape that exposes an inner portion of the second surface after the thinning step, and a removing step of removing the first member from the first surface side in a state where the wafer is supported by the second member.

A method for manufacturing a semiconductor device, the method including irradiating a laminated body for temporary fixing with light and thereby separating the semiconductor member from a resin layer for temporary fixing. The laminated body for temporary fixing is formed by a method including: laminating a film material for temporary fixing on a light-absorbing layer in a direction in which a first principal surface is in contact with the light-absorbing layer; and peeling off a second release film from the film material for temporary fixing to expose a second principal surface. When the maximum values of logarithmic decrements of the first principal surface and the second principal surface of the resin layer for temporary fixing in rigid pendulum measurement are designated as .sub.max1 and .sub.max2, respectively, .sub.max2 is smaller than .sub.max1.

A package structure includes a first dielectric layer disposed on a first patterned circuit layer, a first conductive via in the first dielectric layer and electrically connected to the first patterned circuit layer, a circuit layer on the first dielectric layer, a second dielectric layer on the first dielectric layer and covering the circuit layer, a second patterned circuit layer on the second dielectric layer and including conductive features, a chip on the conductive features, and a molding layer disposed on the second dielectric layer and encapsulating the chip. The circuit layer includes a plurality of portions separated from each other and including a first portion and a second portion. The number of pads corresponding to the first portion is different from that of pads corresponding to the second portion. An orthographic projection of each portion overlaps orthographic projections of at least two of the conductive features.

A package structure including a semiconductor die, a redistribution layer, a plurality of antenna patterns, a die attach film, and an insulating encapsulant is provided. The semiconductor die have an active surface and a backside surface opposite to the active surface. The redistribution layer is located on the active surface of the semiconductor die and electrically connected to the semiconductor die. The antenna patterns are located over the backside surface of the semiconductor die. The die attach film is located in between the semiconductor die and the antenna patterns, wherein the die attach film includes a plurality of fillers, and an average height of the die attach film is substantially equal to an average diameter of the plurality of fillers. The insulating encapsulant is located in between the redistribution layer and the antenna patterns, wherein the insulating encapsulant encapsulates the semiconductor die and the die attach film.

The present disclosure discloses a method of fabricating a semiconductor integrated circuits package with solder wettable plating and relates to a semiconductor package substrate with side wettable flank (SWF) features and a method of manufacturing thereof. In particular, the disclosure relates to leadless semiconductor devices and an associated method of manufacturing such devices. An object of the present disclosure is to provide a manufacturing technique allowing full plating of the side flanks by conventional electro-plating with an external conductive media.