H10P70/23

Method for manufacturing semiconductor device and forming photoresist pattern

A method of manufacturing a semiconductor device includes: forming a pattern formation material layer on a substrate; forming a photoresist on the pattern formation material layer; exposing and developing the photoresist to form a photoresist pattern; performing a first deionized water cleaning on the photoresist pattern; cleaning the photoresist pattern with a cleaning solution including a surfactant; and performing a second deionized water cleaning on the photoresist pattern.

PHOTORESIST POISONING REDUCTION

The present disclosure generally relates to semiconductor processing for forming a semiconductor device. In an example, semiconductor device includes a semiconductor substrate, a nitride structure, and an oxide layer. The nitride structure is over the semiconductor substrate. The oxide layer is on the nitride structure. The semiconductor substrate includes an implanted doped region laterally proximate the nitride structure and the oxide layer. In another example, a nitride structure is formed over a semiconductor substrate. An oxide layer is formed on the nitride structure. A photoresist is formed over the semiconductor substrate. The photoresist has an opening exposing at least a portion of the oxide layer on the nitride structure. An implantation is performed using the photoresist to form an implanted doped region in the semiconductor substrate.

Semiconductor Device and Method
20260068303 · 2026-03-05 ·

A semiconductor device including a cap layer and a method for forming the same are disclosed. In an embodiment, a method includes epitaxially growing a first semiconductor layer over an N-well; etching the first semiconductor layer to form a first recess; epitaxially growing a second semiconductor layer filling the first recess; etching the second semiconductor layer, the first semiconductor layer, and the N-well to form a first fin; forming a shallow trench isolation region adjacent the first fin; and forming a cap layer over the first fin, the cap layer contacting the second semiconductor layer, forming the cap layer including performing a pre-clean process to remove a native oxide from exposed surfaces of the second semiconductor layer; performing a sublimation process to produce a first precursor; and performing a deposition process wherein material from the first precursor is deposited on the second semiconductor layer to form the cap layer.

Substrate processing method and substrate processing apparatus

An etching method includes a first etching step, a processing step, and a second etching step. The first etching step is performed to etch a substrate on which a silicon oxide film and a silicon nitride film are formed with an etching liquid. The processing step is performed to process a pattern in the silicon oxide film on the substrate with a pattern shape processing liquid after the first etching step. The second etching step is performed to etch the substrate with the etching liquid after the processing step.

Composition for semiconductor processing and processing method
12570929 · 2026-03-10 · ·

A composition for semiconductor processing according to the disclosure contains (A) a compound represented by the following general formula (1), (B) a compound represented by the following general formula (2), (C) a compound having at least one functional group selected from the group consisting of an amino group and a salt thereof (excluding a compound having a carboxyl group and a nitrogen-containing heterocyclic compound) and (D) a liquid medium, and, when the content of the (A) component is indicated by M.sub.A [mass %] and the content of the (B) component is indicated by M.sub.B [mass %], M.sub.A/M.sub.B is 1.010.sup.2 to 1.010.sup.6.
RO(CH.sub.2).sub.2O(CH.sub.2).sub.2OH(1)
ROH(2) (In the formula (1) and the formula (2), R's represent the same hydrocarbon group.)

PACKAGE STRUCTURES AND METHODS OF FORMING SAME

A method includes providing an interposer structure including conductive paths, forming micro bumps over the interposer structure and connected to the conductive paths, bonding a first die and a second die onto the micro bumps, forming a molding compound over and around the first die and the second die, performing a planarization process to expose a top surface of the second die, forming a trench in the molding compound to expose a top surface of the first die, forming a thermal interface material (TIM) layer in the trench and over the top surface of the second die, bonding the interposer structure to a substrate, and attaching a heat sink onto the TIM layer. The first die has a first height and the second die has a second height greater than the first height.

RINSE PROCESS AFTER FORMING FIN-SHAPED STRUCTURE

A method for fabricating semiconductor device includes the steps of: forming fin-shaped structures on a substrate; using isopropyl alcohol (IPA) to perform a rinse process; performing a baking process; and forming a gate oxide layer on the fin-shaped structures. Preferably, a duration of the rinse process is between 15 seconds to 60 seconds, a temperature of the baking process is between 50 C. to 100 C., and a duration of the baking process is between 5 seconds to 120 seconds.

SEMICONDUCTOR CORE LAYER INCLUDING GLASS SHEET HAVING EDGE SEALANT STRUCTURE AND METHOD OF MAKING SAME

A package substrate includes: a sheet including glass; build-up layers respectively on a top surface and on a bottom surface of the sheet; structures defining electrically conductive pathways within the sheet and within the build-up layers; and a ribbon-shaped edge structure in recesses defined at lateral edges of the sheet and defined with respect to lateral edges of the build-up layers, the ribbon-shaped edge structure extending in a direction along a thickness of the sheet, having a lateral edge surface facing away from the sheet, and comprising an edge structure material not including glass and not including metal.

POST ETCH PLASMA TREATMENT FOR REDUCING SIDEWALL CONTAMINANTS AND ROUGHNESS

A method of forming features in stack with a silicon containing layer below a mask is provided. Features are etched into the stack. A post etch plasma treatment is provided to reduce surface roughness of sidewalls of the features.

Etchant composition

An etchant composition and a method of fabricating a semiconductor device, the composition including an inorganic acid; about 0.01 parts by weight to about 0.5 parts by weight of colloidal silica; about 0.01 parts by weight to about 30 parts by weight of an ammonium-based additive; and about 20 parts by weight to about 50 parts by weight of a solvent, all parts by weight being based on 100 parts by weight of the inorganic acid.