An etching method includes: providing a substrate having a film and a patterned mask on the film; forming a silicon-containing layer including silicon, carbon, and nitrogen on the substrate using a precursor gas containing silicon; and performing a plasma etching on the film. The substrate is placed under a depressurized environment for a time period from a start time point of the step of forming the silicon-containing layer on the substrate to an end time point of the step of performing the plasma etching on the film.

A method of forming a semiconductor device includes etching a gate stack to form a trench extending into the gate stack, forming a dielectric layer on a sidewall of the gate stack, with the sidewall exposed to the trench, and etching the dielectric layer to remove a first portion of the dielectric layer at a bottom of the trench. A second portion of the dielectric layer on the sidewall of the gate stack remains after the dielectric layer is etched. After the first portion of the dielectric layer is removed, the second portion of the dielectric layer is removed to reveal the sidewall of the gate stack. The trench is filled with a dielectric region, which contacts the sidewall of the gate stack.

Increasing in a contact-resistance between a trench gate lead-out electrode and a gate lead-out contact member is suppressed. It is assumed that a natural oxidation film is formed in the polysilicon film when the trench gate lead-out electrode is formed. In case of the natural oxidation film is formed, a desired etching process is performed so that the natural oxidation film does not protrude beyond the upper surface of the trench gate lead-out electrode.

A method for fabricating a semiconductor device includes sequentially stacking a sacrificial layer and a support layer on a substrate, forming bottom electrodes penetrating the sacrificial layer and the support layer to come into contact with the substrate, patterning the support layer to form a support pattern that connects the bottom electrodes to each other, removing the sacrificial layer to expose surfaces of the bottom electrodes, depositing a conductive layer on the exposed surfaces of the bottom electrodes and a surface of the support pattern, and etching the conductive layer. The etching the conductive layer includes selectively removing the conductive layer on the support pattern to expose the surface of the support pattern. The depositing the conductive layer and the etching the conductive layer are alternately performed in a same chamber.

The present disclosure provides a method of manufacturing a semiconductor structure. A substrate is provided. A multi-layer structure is formed over the substrate, wherein the multi-layer structure includes a semiconductive material layer and an oxide layer over the semiconductive material layer. The oxide layer is patterned to form a first patterned layer. A second patterned layer is formed on the semiconductive material layer and alternately arranged with the first patterned layer. A first etching operation is performed on the substrate using a comprehensive pattern of the first patterned layer and the second patterned layer.

A semiconductor device with an isolation structure and a method of fabricating the same are disclosed. The semiconductor device includes first and second fin structures disposed on a substrate and first and second pairs of gate structures disposed on the first and second fin structures. The first end surfaces of the first pair of gate structures face second end surfaces of the second pair of gate structure. The first and second end surfaces of the first and second pair of gate structures are in physical contact with first and second sidewalls of the isolation structure, respectively. The semiconductor device further includes an isolation structure interposed between the first and second pairs of gate structures. An aspect ratio of the isolation structure is smaller than a combined aspect ratio of the first pair of gate structures.

An excellent method of manufacturing a patterned substrate which is capable of easily patterning an insulation layer to provide a patterned substrate even when a difficult-to-etch material is used for the insulation layer, a patterned substrate obtained thereby, and a patterned substrate intermediate thereof are provided. The method of manufacturing a patterned substrate with the insulation layer and an electrode layer stacked in this order on a substrate comprising: forming an organic resist material layer; irradiating the organic resist material layer with radiation or an electromagnetic wave of a wavelength of 10 to 780 nm and developing the organic resist material layer to form a first patterning layer; and removing the first patterning layer.

Methods and related systems for etching. Embodiments of the present disclosure comprise etching an etchable layer by executing a cyclical etching process comprising a plurality of etching cycles. Ones from the plurality of etching cycles comprises a volatilization reactant pulse that comprises exposing a substrate to a volatilization reactant. The volatilization reactant is free from metals.

In general, according to one embodiment, a method of manufacturing a capacitor includes subjecting a conductive layer to dry etching to form a pattern including a connection portion extending from the conductive layer to one or more openings, and cutting a processing target substrate along a cutting position which includes a position where the connection portion is cut in a direction crossing an extending direction of the connection portion, so as to have the connection portion and a conductive material portion electrically disconnected from each other and to manufacture at least one capacitor element portion.

The current disclosure relates to a method of etching etchable material from a semiconductor substrate. The method comprises providing a substrate comprising the etchable material into a reaction chamber and providing a haloalkylamine into the reaction chamber in vapor phase for etching the etchable material. The disclosure further relates to a semiconductor processing assembly, and to a method of cleaning a reaction chamber.