Patent classifications
H10P90/124
Method for manufacturing wafer having functional film
A method for manufacturing a wafer having a functional film, with an outer peripheral part of a top face of the wafer annularly exposed, the method including: spin-coating a high-viscosity coating material that contains a functional film constituent over the top face of the wafer to form a coating film; subsequently, supplying a cleaning liquid to the outer peripheral part of the top face of the wafer and kept rotated to remove the coating film on the outer peripheral part of the top face of the wafer; subsequently, heating the coating film on the wafer to form a fluidity suppressed film; subsequently, supplying a cleaning liquid to the outer peripheral part of the top face of the wafer having the fluidity suppressed film and kept rotated to remove the fluidity suppressed film on the top face of the wafer; and subsequently, heating the fluidity suppressed film on the wafer.
Processing method of bonded wafer
A method for processing a bonded wafer includes forming a plurality of modified layers in a form of rings through positioning focal points of laser beams with a wavelength having transmissibility with respect to a first wafer inside the first wafer, from which a chamfered part and a notch are to be removed, from a back surface of the first wafer and executing irradiation, holding a second wafer side on a chuck table, and grinding the back surface of the first wafer to thin the first wafer. In forming the modified layer, the focal points of the laser beams are set in such a manner as to gradually get closer to a joining layer from an inner side toward an outer side of the first wafer in a radial direction to thereby form the modified layers as to widen toward the lower side.
WAFER PROCESSING METHOD
A wafer processing method is disclosed. A second wafer is bonded to a first wafer. The rear surface of the second wafer is subjected to a first grinding process, thereby thinning the second wafer to a first thickness. A sacrificial layer is formed on the rear surface of the second wafer. A one-step wafer edge trimming process is then performed to remove an outer edge region of the sacrificial layer and the second wafer in one-step cut using a blade. The sacrificial layer is removed from the rear surface of the second wafer.
Bonded wafer processing method
A method of processing a bonded wafer formed by bonding a first wafer and a second wafer to each other via a bonding layer includes a coordinate generating step of generating coordinates of an undersurface position of the first wafer, the undersurface position being to be irradiated with laser beams, such that an end position of a crack extending from modified layers formed within the first wafer is located at an outer circumference of the bonding layer, and a modified layer forming step of forming a plurality of modified layers in a ring shape by irradiating the coordinates generated in the coordinate generating step with the laser beams of a wavelength transmissible through the first wafer.
Processing method of bonded wafer
A processing method of a bonded wafer includes forming a plurality of modified layers in a form of rings through positioning focal points of laser beams with a wavelength having transmissibility with respect to a first wafer inside the first wafer, from which a chamfered part is to be removed, from a back surface of the first wafer and executing irradiation, holding a second wafer side on a chuck table, and grinding the back surface of the first wafer to thin the first wafer. In the forming the modified layers, the focal points of the laser beams are set in such a manner as to gradually get closer to a joining layer in a direction from an inner side of the first wafer toward an outer side thereof, so that the plurality of ring-shaped modified layers are formed in a form of descending stairs.
REDUCING THERMAL BOW SHIFT
Provided are methods and structures for keeping the integrity of layers deposited on a semiconductor wafer through a thermal cycle. Deposition of a second backside layer, or a cap, with an internal stress opposite to a first backside layer may be used to reduce bow shift of a wafer during a thermal cycle. The first backside layer may have a tensile internal stress or a compressive internal stress. The second backside layer has an internal stress opposite to the first backside layer. Each of the backside layers may be deposited by a backside deposition apparatus.
PRODUCTION METHOD FOR OPTICAL SEMICONDUCTOR ELEMENT
Provided is a production method for an optical semiconductor element with a high yield by preventing wafer damage caused by grinding. A production method for an optical semiconductor element comprises: a step of forming a laminate of compound semiconductor layers on one main surface of a compound semiconductor substrate having cleavability; and a grinding step of grinding the other main surface of the compound semiconductor substrate, wherein a skewness (Ssk) in surface roughness measurement of a ground surface of the compound semiconductor substrate immediately after the grinding step is positive.
Carrier structure and methods of forming the same
A carrier structure and methods of forming and using the same are described. In some embodiments, the method includes forming one or more devices over a substrate, forming a first interconnect structure over the one or more devices, and bonding the first interconnect structure to a carrier structure. The carrier structure includes a semiconductor substrate, a release layer, and a first dielectric layer, and the release layer includes a metal nitride. The method further includes flipping over the one or more devices so the carrier structure is located at a bottom, performing backside processes, flipping over the one or more devices so the carrier structure is located at a top, and exposing the carrier structure to IR lights. Portions of the release layer are separated from the first dielectric layer.
Semiconductor device and manufacturing method thereof
A method of manufacturing a semiconductor device includes bonding a first wafer with a second wafer. The second wafer includes a substrate, an isolation structure in the substrate, a transistor on the substrate, and a interconnect structure over the second transistor. A first etching process is performed to form a first via opening and a second via opening in the substrate. The second via opening extends to the isolation structure, and the second via opening is deeper than the first via opening. A second etching process is performed such that the first via opening exposes the substrate. A third etching process is performed such that the first via opening and the second via opening exposes the interconnect structure, and the second via opening penetrates the isolation structure. A first via is formed in the first via opening and a second via is formed in the second via opening.