A heat sink, a thermal module, and an electronic device are provided. The heat sink includes a base and a plurality of curved fins arranged in parallel on the base. Each curved fin has a plurality of wave peaks, with a pitch defined between any two adjacent wave peaks, and at least two of the plurality of wave peaks are different.

One or more devices and/or methods provided herein relate to a method for fabricating a filtering electronic device having a co-integrated impedance modification element and signal transmission line. An electronic structure can comprise a circuit board, and a first plate and a second plate retaining the circuit board therebetween, wherein the first plate and the second plate each have a cryogenic thermal contraction rate that is lower than a cryogenic thermal contraction rate of the circuit board. In one or more embodiments, a silicon chip can be physically coupled to the circuit board by a plurality of solder bumps and disposed between the first plate and the second plate.

In an embodiment, a device includes: a substrate having a first side and a second side opposite the first side; an interconnect structure adjacent the first side of the substrate; and an integrated circuit device attached to the interconnect structure; a through via extending from the first side of the substrate to the second side of the substrate, the through via being electrically connected to the integrated circuit device; an under bump metallurgy (UBM) adjacent the second side of the substrate and contacting the through via; a conductive bump on the UBM, the conductive bump and the UBM being a continuous conductive material, the conductive bump laterally offset from the through via; and an underfill surrounding the UBM and the conductive bump.

In an embodiment, a device includes: a substrate having a first side and a second side opposite the first side; an interconnect structure adjacent the first side of the substrate; and an integrated circuit device attached to the interconnect structure; a through via extending from the first side of the substrate to the second side of the substrate, the through via being electrically connected to the integrated circuit device; an under bump metallurgy (UBM) adjacent the second side of the substrate and contacting the through via; a conductive bump on the UBM, the conductive bump and the UBM being a continuous conductive material, the conductive bump laterally offset from the through via; and an underfill surrounding the UBM and the conductive bump.

A thin semiconductor device with enhanced edge protection, and a method of manufacturing thereof. For example and without limitation, various aspects of this disclosure provide a thin semiconductor device comprising a substrate with an edge-protection region, and a method of manufacturing thereof.

The present disclosure relates to methods and apparatus for forming a thin-form-factor semiconductor device package. In certain embodiments, a glass or silicon substrate is patterned by laser ablation to form structures for subsequent formation of interconnections therethrough. The substrate is thereafter utilized as a frame for forming a semiconductor device package, which may have one or more embedded double-sided dies therein. In certain embodiments, an insulating layer is formed over the substrate by laminating a pre-structured insulating film thereon. The insulating film may be pre-structured by laser ablation to form structures therein, followed by selective curing of sidewalls of the formed structures.

A modular POL component can be arranged to define a half-bridge converter topology, and can be coupled with other modular POL power components to define a full-bridge or 3-phase AC converter topology based on a desired power output. The assembled POL components can be mounted on a common electrically insulative substrate to define a POL power conversion device to provide the desired power output.

A packaging apparatus and methodology for a glass core package that can replace a BGA pinout with a well material perforated with through-holes filled with LM and protected by a thin layer of a dielectric material. The glass package with liquid metal (LM) socketing is to attach to a LM-compatible socket; the LM-compatible socket can be soldered to a main board or printed circuit board (PCB).

A semiconductor device assembly comprises an RDL including an external surface with external contacts, an internal surface with internal contacts, and conductors coupling the internal contacts to the external contacts. The assembly further includes a device connection layer having a first surface with first contact pads, a second surface with second contact pads, first conductive structures electrically coupling each of the first contact pads to a corresponding second contact pad, and a second plurality of conductive structures electrically coupling each of a first subset of the second plurality of contact pads to a corresponding contact pad of a second subset of the second plurality of contact pads. The assembly further includes stacks of semiconductor devices disposed between the RDL and the device connection layer, each stack in a cavity in a monolithic glass structure. The stacks electrically couple internal contacts to the first contact pads through TSVs in the stacks.

An interposer device includes a first core, a second core hybrid bonded to the first core, a first redistribution layer (RDL), and a second RDL. The first core and the second core are located between the first RDL and the second RDL.