A method for assembling one or more microchips into respective holes in a substrate surface of a separate receiving substrate for microchip insertion that is out-of-plane in relation to the substrate surface. The microchips are placed on the substrate surface and moved by one or more magnetic fields affecting a ferromagnetic layer of each microchip so that the microchips become out-of-plane oriented in relation to the substrate surface and are assembled into the holes.

A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor die, a package substrate, and at least one bonding wire. The package substrate includes a dam structure to define a space where the semiconductor die is placed. The bonding wire is electrically connected between the semiconductor die and the package substrate.

A radio frequency (RF) chip package includes: an RF die; a first peripheral circuit chip; a second peripheral circuit chip; a substrate having a -shaped step formed on a portion thereof so that the RF die is mounted on top of the step of the substrate and the first peripheral circuit chip and the second peripheral circuit chip are mounted on top of the substrate where no step is formed; a first mutual inductance controller for controlling the dimension of the mutual inductance between the first peripheral circuit chip and the RF die; and a second mutual inductance controller for controlling the dimension of the mutual inductance between the second peripheral circuit chip and the RF die.

A semiconductor device package comprises a semiconductor device, a first encapsulant surrounding the semiconductor device, a second encapsulant covering the semiconductor device and the first encapsulant, and a redistribution layer extending through the second encapsulant and electrically connected to the semiconductor device.

Provided herein include various examples of an apparatus, a sensor system and examples of a method for manufacturing aspects of an apparatus, a sensor system. The method may include forming bumps on a surface of one or more electrical contacts, where the one or more electrical contacts are accessible on an upper surface of a die, where the die is oriented on a substrate, and where the electrical contacts comprise bonding pads. The method may also include coupling one or more additional electrical contacts to the one or more electrical contacts, where the coupling comprises wire-bonding each additional electrical contact of the additional electrical contacts to one of the one or more electrical contacts accessible on the upper surface of the die, via a portion of the bumps on the surface of the one or more electrical contacts, thereby forming wire-bonded connections.

A method for making an electronic package is provided. The method includes providing a substrate strip comprising substrate assemblies, each substrate assembly comprises a first substrate and a second substrate connected to the first substrate via a flexible link, the first substrate comprises a first mounting surface, the second substrate comprises a second mounting surface that is not at a same side of the substrate assembly as the first mounting surface; disposing the substrate strip on a first carrier; attaching a first electronic component onto the first mounting surface; disposing the substrate strip on a second carrier with a plurality of cavities, the first electronic component is received within one of the plurality of cavities; attaching a second electronic component onto the second mounting surface; singulating the substrate assemblies from each other; and bending the flexible link to form an angle between the first substrate and the second substrate.

A method for manufacturing a light emitting device includes: preparing a first substrate having an upper surface comprising an element placement region; placing a light emitting element in the element placement region; disposing an uncured, sheet-like light-transmissive member on the light emitting element and bringing an outer edge of a lower surface of the light-transmissive member into contact with an outer upper surface of the element placement region of the first substrate by pressing the light-transmissive member; and disposing a first protrusion portion along an outer edge of an upper surface of the light-transmissive member so that the first protrusion portion extends over the upper surface of the first substrate and the upper surface of the light-transmissive member.

An apparatus comprising a first substrate, a dam structure disposed on a first side of the first substrate, and an integrated circuit (IC) memory chip coupled to the first side of the first substrate by a plurality of first conductive members. A second substrate is coupled to a second side of the first substrate by a plurality of second conductive members. A lid coupled to the second substrate encloses the IC memory chip and the first substrate. A thermal interface material (TIM) is coupled between the lid and the dam structure.

A substrate includes a ceramic tile and a three-dimensional (3D) conductive structure. The 3D conductive structure includes a planar base layer having a bottom surface bonded to a top surface of the ceramic tile, and a block disposed above the planar base layer. The block is monolithically integrated with the planar base layer. A top surface of the block is configured as a die attach pad. The planar base layer has a base vertical thickness from the top surface of the ceramic tile to a top surface of the planar base layer. The block and the planar base layer have a combined vertical thickness from the top surface of the ceramic tile to a top surface of the block that is greater than the base vertical thickness.

Methods of forming a back side image sensor device, as well as back side image sensor devices formed, are disclosed. In one such a method, an image sensor wafer having a first dielectric layer with a first surface is obtained. A reconstituted wafer having a processor die and a second dielectric layer with a second surface is obtained. The reconstituted wafer and the image sensor wafer are bonded to one another including coupling the first surface of the first dielectric layer and the second surface of the second dielectric layer. In another method, such formation is for a processor die bonded to an image sensor wafer. In yet another method, such formation is for a processor die bonded to an image sensor die.