An electronic device includes a conductive lead, a semiconductor die, a package structure enclosing the semiconductor die and a portion of the conductive lead, and a non-conductive die attach film extending between the conductive lead and the semiconductor die and having a thickness less than 50 m. A method of fabricating an electronic device includes singulating portions of a non-conductive die attach film on a carrier, partially singulating prospective die areas from a front side of a wafer, removing wafer material from a back side of the wafer to separate a semiconductor die from the wafer, and attaching a backside the semiconductor die to a singulated portion of the non-conductive die attach film on the carrier.

A semiconductor package contains a first semiconductor die, electrically coupled to a plurality of leads around a perimeter of the semiconductor package via a molded interconnect. The molded interconnect comprises a plurality of embedded interconnects in a first mold compound which electrically couple the plurality of bond pads of the first semiconductor die to the plurality of leads of the semiconductor package. The molded interconnect may have a greater cross-sectional area at a given pitch compared to a similar wire bonded semiconductor package and allow advantageous thermal management of the semiconductor package compared to other electrical coupling techniques. The molded interconnect may allow small high-power integrated circuits to be packaged with a package footprint which is smaller than would otherwise be available.

A MEMS pressure sensor packaged with a molding compound. The MEMS pressure sensor features a lead frame, a MEMS semiconductor die, a second semiconductor die, multiple pluralities of bonding wires, and a molding compound. The MEMS semiconductor die has an internal chamber, a sensing component, and apertures. The MEMS semiconductor die and the apertures are exposed to an ambient atmosphere. A method is desired to form a MEMS pressure sensor package that reduces defects caused by mold flashing and die cracking. Fabrication of the MEMS pressure sensor package comprises placing a lead frame on a lead frame tape; placing a MEMS semiconductor die adjacent to the lead frame and on the lead frame tape with the apertures facing the tape and being sealed thereby; attaching a second semiconductor die to the MEMS semiconductor die; attaching pluralities of bonding wires to form electrical connections between the MEMS semiconductor die, the second semiconductor die, and the lead frame; and forming a molding compound.

Embodiments of the invention include a microelectronic device that includes a first substrate having radio frequency (RF) components and a second substrate that is coupled to the first substrate. The second substrate includes a first conductive layer of an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher. A mold material is disposed on the first and second substrates. The mold material includes a first region that is positioned between the first conductive layer and a second conductive layer of the antenna unit with the mold material being a dielectric material to capacitively couple the first and second conductive layers of the antenna unit.

The present disclosure relates to dual-side cooling power modules, manufacturing methods thereof, and electrical systems. There is provided a dual-side cooling power module, comprising: a first multilayer substrate, comprising: a first insulating material layer, a first metal layer, and a second metal layer, the second metal layer comprising a plurality of first step structures having a first height; a second multilayer substrate, comprising: a second insulating material layer, a third metal layer, and a fourth metal layer, the fourth metal layer comprising a plurality of second step structures having a second height; and one or more chips disposed between the first multilayer substrate and the second multilayer substrate and attached to the second metal layer and the fourth metal layer. Each chip is attached and supported between a corresponding first step structure and a corresponding second step structure and is electrically connected with them.

The power conversion device includes a first semiconductor module, a second semiconductor module, a third semiconductor module, and a capacitor module. As viewed in a z direction, the first center line of the first semiconductor module, the second center line of the second semiconductor module, and the third center line of the third semiconductor module intersect the capacitor body. The first angle formed by the first center line and the second center line and the second angle formed by the second center line and the third center line are equal to each other. The lengths of the first busbar, the second busbar and the third busbar are equal to each other.

A semiconductor package includes a lead frame, a low side field-effect transistor (FET), a high side FET, a metal clip, and a molding encapsulation. The low side FET is flipped and is attached to a first die paddle of the lead frame. The lead frame comprises one or more voltage input (Vin) leads; a gate lead; one or more switching node (Lx) leads; a first die paddle; a second die paddle; and an end paddle. Each of an exposed bottom surface of the one or more Lx leads is directly connected to an exposed bottom surface of the end paddle. A longitudinal direction of an exposed bottom surface of the gate lead is perpendicular to a longitudinal direction of each of the exposed bottom surface of the one or more Lx leads. An entirely of each of the one or more Vin leads is of the full thickness.

An electronic device has a molded package (e.g., a quad flat no leads package) with attached connectors. The molded package includes one or more semiconductor dies and is pretested prior to attachment of the connectors. Along these lines, such molded packages may be pretested in parallel at high volume due to their relatively small form factor (e.g., at numbers several times greater than those for testing leaded socket assemblies). Following such pretesting, the connectors are attached to the pretested molded package (e.g., by directly fusing the connectors to metallic pads on surfaces of the packaged integrated circuit via laser welding or soldering). Such electronic devices may be further tested if desired (e.g., opens/shorts tested) and encased within housings to form larger modules (e.g., accelerometers, pressure sensors, etc.).

A semiconductor package includes a film substrate that includes a chip region, a first edge region, and a second edge region. The semiconductor package includes a semiconductor chip on the chip region, where the semiconductor chip includes first conductive bumps adjacent to the first edge region and second conductive bumps adjacent to the second edge region. The semiconductor package includes first pads and second pads on the first edge region, and first lines that electrically connect ones of the first pads to ones of the first conductive bumps. The second pads are dummy pads. A first set of the second pads and a second set of the second pads are spaced apart from each other in the second direction with the first pads therebetween. The first set of second pads includes ten or more consecutive second pads with no first pads therebetween.

A described example includes a method for fabricating an integrated circuit (IC) device. The method can include forming a mask on a surface of a multi-layer substrate, in which the multi-layer substrate includes at least one leadframe having spaced apart regions of copper distributed across and extending from the surface into at least one layer of the multi-layer substrate. The method can also include forming nanotwin copper bond pads on the surface of the multi-layer substrate over a respective region of the regions of copper. The method can also include removing the mask and forming a layer of an insulating material over the surface of the multi-layer substrate and around the nanotwin copper bond pad.