A semiconductor structure includes a diamond substrate, a SiC intermediate layer, and a device layer that are stacked. The diamond substrate includes a plurality of first grooves on a side close to the SiC intermediate layer, the plurality of first grooves are spaced apart, the SiC intermediate layer includes a plurality of second grooves on a side close to the diamond substrate, the plurality of second grooves are spaced apart, and the plurality of first grooves and the plurality of second grooves are in a one-to-one correspondence and form a plurality of cavities. Adopting the structure including the diamond substrate, the SiC intermediate layer, and the device layer in the present disclosure may reduce defects caused by a lattice mismatch and a thermal mismatch between a substrate and a device, thereby improving overall quality and reliability of a semiconductor structure.

A SiC epitaxial wafer according to an embodiment includes a SiC substrate, and a SiC epitaxial layer on one surface of the SiC substrate. The SiC epitaxial layer has a buffer layer and a drift layer. The buffer layer is located between the drift layer and the SiC substrate, and has an impurity concentration higher than an impurity concentration of the drift layer. The impurity concentration of the buffer layer is 2.010.sup.18 cm.sup.3 or more. In a case where the impurity concentration at a center in plan view in a laminating direction is measured in the laminating direction, uniformity of the impurity concentration in the buffer layer is 50% or less.

A method for producing a planar semiconductor surface includes forming a workpiece that has a carrier substrate, one or more insulating layers, a semiconductor layer, a first etch stop layer, and a second etch stop layer; forming a contact on the workpiece; biasing the workpiece to a second voltage through the contact; etching the second etch stop layer and part of the first etch stop layer with a photo-electrochemical etching and the second voltage that selectively removes the second etch stop layer faster than the first etch stop layer; biasing the workpiece to a first voltage through the contact; and etching the first etch stop layer and part of the semiconductor layer with the photo-electrochemical etching and the first voltage that selectively removes the first etch stop layer faster than the semiconductor layer to produce a semiconductor device with a planar surface on the semiconductor layer.

A silicon carbide epitaxial substrate according to the present disclosure includes: a silicon carbide substrate; a first silicon carbide epitaxial layer disposed on the silicon carbide substrate; and a second silicon carbide epitaxial layer disposed on the first silicon carbide epitaxial layer. When an area density of first particles in the first silicon carbide epitaxial layer is defined as a first area density and an area density of second particles in the second silicon carbide epitaxial layer is defined as a second area density, a value determined by dividing the first area density by the second area density is more than 0.5 and less than 1. The first particles and the second particles each have a maximum diameter of 2 m to 50 m.

A single crystal silicon substrate with a nitride semiconductor layer, including: a single crystal silicon substrate; a 3C-SiC single crystal film epitaxially grown on the single crystal silicon substrate; and a nitride semiconductor layer epitaxially grown on the 3C-SiC single crystal film. Dislocations are formed throughout the single crystal silicon substrate, a length (dislocation length) of each of the dislocations when seen in a planar projection onto the single crystal silicon substrate is greater than or equal to 1 mm, and a density of the dislocations is greater than or equal to 10/cm.sup.2. This provides a single crystal silicon substrate with a nitride semiconductor layer having a large diameter such as 200 mm or 300 mm that is made using a regular thickness Si substrate and has less warpage and especially no cracks, and a method for producing such a single crystal silicon substrate with a nitride semiconductor layer.

A silicon carbide (SiC) semiconductor device is proposed. The SiC semiconductor device includes a buffer layer of a first conductivity type and a drift layer of the first conductivity type arranged, along a vertical direction, on the buffer layer. A vertical profile of a doping concentration of the buffer layer includes at least a first valley portion, a first plateau portion and a first transition portion extending from the first valley portion to the first plateau portion. The doping concentration of each of the first valley portion or the first plateau portion varies by less than 20 %. A vertical extent of the first transition portion ranges from 1 % to 30 % of a vertical extent of the first valley portion.

A substrate (1) for a semiconductor device of the present invention includes a diamond substrate (10) and a silicon carbide layer (20) located on a part or all of one surface (10a) of the diamond substrate (10), wherein the silicon carbide layer (20) has a thickness of 20 nm or less, and wherein a surface (20a) of the silicon carbide layer (20) has an arithmetic mean roughness Ra of 0.5 nm or less.

A semiconductor device has a substrate made of a first semiconductor material. The first semiconductor material is silicon carbide. A first semiconductor layer made of the first semiconductor material is disposed over the substrate. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The second semiconductor material is silicon. A third semiconductor layer made of the second semiconductor material can be disposed between the first semiconductor layer and second semiconductor layer. A semiconductor device is formed in the second semiconductor layer. The semiconductor device can be a power MOSFET or diode. The second semiconductor layer with the electrical component provides a first portion of a breakdown voltage for the semiconductor device and the first semiconductor layer and substrate provide a second portion of the breakdown voltage for the semiconductor device.