Methods of making a semiconductor device assembly are provided. The methods can comprise providing a first semiconductor device having a first dielectric material at a first surface, providing a carrier wafer having a second dielectric material at a second surface, and forming a dielectric-dielectric bond between the first dielectric material and the second dielectric material. At least one of the first surface and the second surface includes a cavity configured to entrap a gas during the formation of the bond. The method can further include stacking one or more second semiconductor devices over the first semiconductor device to form the semiconductor device assembly, and removing the semiconductor device assembly from the carrier wafer.

A display device includes a substrate including a display area and a pad area; a first conductive layer including a first pad electrode in the pad area; and a second conductive layer the second conductive layer includes a second pad electrode on the first pad electrode in the pad area; the first pad electrode and the second pad electrode overlap in a first direction that is a thickness direction, and do not overlap in a second direction perpendicular to the first direction.

This insulation module is provided with: a first conductor and a second conductor, which are buried in an insulating layer so as to face each other at a distance in the thickness direction of the insulating layer; a first electrode which is connected to the first conductor; a second electrode which is connected to the second conductor, while being arranged at a position that is away from the first electrode when viewed from the thickness direction of the insulating layer; a passivation layer which is formed on the surface of the insulating layer; a low dielectric constant layer which is formed on the surface of the passivation layer, and has a lower dielectric constant than the passivation layer; and a mold resin which covers the low dielectric constant layer.

A semiconductor device package includes a substrate, a first patterned conductive layer, a second patterned conductive layer, a dielectric layer, a third patterned conductive layer and a connector. The substrate has a top surface. The first patterned conductive layer is on the top surface of the substrate. The second patterned conductive layer contacts the first patterned conductive layer. The second patterned conductive layer includes a first portion, a second portion and a third portion. The second portion is connected between the first portion and the third portion. The dielectric layer is on the top surface of the substrate. The dielectric layer covers the first patterned conductive layer and surrounds the second portion and the third portion of the second patterned conductive layer. The first portion of the second patterned conductive layer is disposed on the dielectric layer. The third patterned conductive layer is on the second patterned conductive layer, and the connector is directly on the third patterned conductive layer.

The display device includes light emitting elements disposed on a first surface of a substrate, a connection electrode disposed on a second surface of the substrate, a first protective layer disposed on the connection electrode, and a second protective layer disposed on the first protective layer. A surface roughness of the second protective layer is greater than a surface roughness of the first protective layer.

A display panel, a manufacturing method thereof, and a display device are provided. The display panel includes a driving substrate, a first light-emitting device layer disposed on a side of the driving substrate, and a second light-emitting device layer disposed on a side the driving substrate away from the first light-emitting device layer. The first light-emitting device layer includes a plurality of first light-emitting devices. The second light-emitting device layer includes a plurality of second light-emitting devices. The driving substrate includes a plurality of driving thin-film transistors. A driving thin-film transistor is connected to a first light-emitting device and a second light-emitting device. The first light-emitting device layer and the second light-emitting device layer are respectively disposed on two sides of the driving substrate. A single driving thin-film transistor is configured to drive the first light-emitting device and the second light-emitting device simultaneously to emit light.

A semiconductor package includes a substrate having first and second surfaces opposite to each other in a vertical direction, a through electrode extending through the substrate and having an upper surface that is convex or concave, a protective pattern structure on the second surface of the substrate, and a conductive pad extending through the protective pattern structure. An upper portion of the conductive pad contacts an upper surface of the protective pattern structure. A lower portion of the conductive pad contacts an upper surface of the through electrode.

In various embodiments, a bonded structure is disclosed. The bonded structure can include an element and a passive electronic component having a first surface bonded to the element and a second surface opposite the first surface. The passive electronic component can comprise a first anode terminal bonded to a corresponding second anode terminal of the element and a first cathode terminal bonded to a corresponding second cathode terminal of the element. The first anode terminal and the first cathode terminal can be disposed on the first surface of the passive electronic component.

A described example includes: a semiconductor die having a device side surface and an opposing backside surface, the backside surface mounted to a die pad of a lead frame, the lead frame comprising conductive leads spaced from the die pad; a conductor layer overlying the device side surface; bond pads including bond pad conductors formed in the conductor layer, a nickel layer over the bond pad conductors, and a palladium or gold layer over the nickel layer; conductor traces formed in the conductor layer, the conductor traces free from the nickel layer and the palladium or gold layer; bond wires bonded to the bond pads electrically coupling the bond pads to conductive leads; and mold compound covering the semiconductor die, the bond pads, the bond wires, and portions of the lead frame, wherein portions of the conductive leads are exposed from the mold compound to form terminals.

A microelectronic device includes a die with input/output (I/O) terminals, and a dielectric layer on the die. The microelectronic device includes electrically conductive pillars which are electrically coupled to the I/O terminals, and extend through the dielectric layer to an exterior of the microelectronic device. Each pillar includes a column electrically coupled to one of the I/O terminals, and a head contacting the column at an opposite end of the column from the I/O terminal. The head extends laterally past the column in at least one lateral direction. Methods of forming the pillars and the dielectric layer are disclosed.