A method for forming a high resistivity handle substrate for a composite substrate comprises: providing a base substrate made of silicon; exposing the base substrate to a carbon single precursor at a pressure below atmospheric pressure to form a polycrystalline silicon carbide layer having a thickness of at least 10 nm on the surface of the base substrate; and then growing a polycrystalline charge trapping layer on the carbon-containing layer.

Semiconductor devices having a modified dicing street for hybrid bonding are provided. In one aspect, a semiconductor device includes: at least one die having a metal disposed on a semiconductor wafer, where a portion of the metal present along at least one edge of the at least one die includes an implant selected from: bismuth, hydrogen, and combinations thereof. The at least one die may be used for hybrid bonding via a combination of metal and dielectric bonds. A method of fabricating the present semiconductor devices is also provided.

An object is to provide a semiconductor device with reduced standby power. A transistor including an oxide semiconductor as an active layer is used as a switching element, and supply of a power supply voltage to a circuit in an integrated circuit is controlled by the switching element. Specifically, when the circuit is in an operation state, supply of the power supply voltage to the circuit is performed by the switching element, and when the circuit is in a stop state, supply of the power supply voltage to the circuit is stopped by the switching element. In addition, the circuit supplied with the power supply voltage includes a semiconductor element which is a minimum unit included in an integrated circuit formed using a semiconductor. Further, the semiconductor included in the semiconductor element contains silicon having crystallinity (crystalline silicon).

An NCFET transistor comprises a semiconductor-on-insulator substrate for a field-effect transistor, and the NCFET transistor successively comprises, from its base to its surface: a semiconductor carrier substrate; a single ferroelectric layer, arranged in direct contact with the carrier substrate, which layer is designed to be biased so as to form a negative capacitance; and an active layer of a semiconductor material, which layer is designed to form the channel of the transistor, and is arranged in direct contact with the ferroelectric layer. The NCFET transistor further comprises a channel that is arranged in the active layer, a source and a drain that are arranged in the active layer on either side of the channel, and a gate that is arranged on the channel and is insulated from the channel by a gate dielectric.

A method of a semiconductor-on-insulator structure includes the following steps. A semiconductor donor substrate is provided. A first implantation process is performed to form an exfoliation layer of the semiconductor donor substrate with a first ion concentration. A second implantation process is performed on a perimeter region of the exfoliation layer to form a high concentration region of the exfoliation layer with a second ion concentration higher than the first ion concentration. The semiconductor donor substrate is bonded to a semiconductor handle substrate, so that the exfoliation layer with the high concentration region is bonded to the semiconductor handle substrate. An annealing process is performed to separate the exfoliation layer from the rest of the semiconductor donor substrate.

A method for producing a semiconductor structure comprises: a) providing a working layer of a semiconductor material; b) providing a carrier substrate of a semiconductor material; c) depositing a thin film of a semiconductor material different from that or those of the working layer and the carrier substrate on a free face to be joined of the working layer and/or the carrier substrate; d) directly joining the free faces of the working layer and the carrier substrate, e) annealing the joined structure at an elevated temperature to bring about segmentation of the encapsulated thin film and form a semiconductor structure comprising an interface region between the working layer and the carrier substrate, the interface region comprising: regions of direct contact between the working layer and the carrier substrate; and agglomerates comprising the semiconductor material of the thin film adjacent the regions of direct contact.

A semiconductor structure includes a substrate, an isolation layer over the substrate, an epitaxial layer over the substrate and covering the isolation layer, and a deep trench isolation that extends into the epitaxial layer. The deep trench isolation connects the isolation layer. The isolation layer is disposed in the second region of the semiconductor structure, but does not extend into the first region of the semiconductor structure. The semiconductor structure further includes a first element formed in the first region and a second element formed in the second region. In addition, the substrate acts as the drain region of the first element. The second element is disposed in an isolation region that is defined by the deep trench isolation and the isolation layer.

A semiconductor-on-insulator substrate for use in RF applications, such as a silicon-on-insulator substrate, comprises a semiconductor top layer, a buried oxide layer and a passivation layer over a support substrate. In addition, a penetration layer is provided between the passivation layer and the silicon support substrate to ensure sufficient high resistivity below RF features and avoid increased migration of dislocations in the support substrate. RF devices may be fabricated on and/or in such a semiconductor-on-insulator substrate.

A support for a semiconductor structure includes a base substrate, a first silicon dioxide insulating layer positioned on the base substrate and having a thickness greater than 20 nm, and a charge trapping layer having a resistivity higher than 1000 ohm.Math.cm and a thickness greater than 5 microns positioned on the first insulating layer.

Methods for forming a silicon-on-insulator (SOI) substrate are disclosed. A substrate includes a sacrificial layer and a first substrate layer over the sacrificial layer. Vias are formed around a first substrate region of the first substrate layer down to the sacrificial layer. The sacrificial layer is etched away, forming a buried volume. Substrate supports connecting the first substrate region to the first substrate layer are converted into a dielectric material. The buried volume and the vias are filled with a first dielectric material, forming a buried dielectric layer and a first dielectric sidewall around the first substrate region. A second substrate layer is formed over the first substrate layer. A trench is formed around a second substrate region of the second substrate layer. The trench is filled with a second dielectric material to form a second dielectric sidewall around the second substrate region connected to the first dielectric sidewall.