A packaged module includes an electrically conductive coil and a composite magnetic molding material covering the electrically conductive coil. The composite magnetic molding material includes a magnetic filler including coated magnetic particles (MB) dispersed in a composite non-magnetic material (MA). The composite magnetic molding material further includes a modulus reducing filler (MC) including modulus reducing particles or rubber particles or including functional groups having OH or COOH.

A packaged module including an electrically conductive coil mounted on a substrate. The packaged module is encapsulated with a magnetic molding compound covering the electrically conductive coil. The electrically conductive coil is core-less without a magnetic core disposed therein. The packaged module may further include an integrated circuit (IC) die disposed in the packaged module.

A packaged module including an electrically conductive coil disposed on a substrate and a magnetic molding compound encapsulating the packaged module. The magnetic molding compound includes coated magnetic metal particles dispersed in a non-magnetic material. The packaged module may be adapted to be used in a power management apparatus or a power conversion application system to increase an integration density and/or a power density of the system.

A packaged module including an electrically conductive coil directly mounted on a substrate and a magnetic molding compound encapsulating the packaged module. The electrically conductive coil has coil terminals substantially coplanar with each other. The packaged module further includes an integrated circuit (IC) die disposed in the packaged module to co-work with the electrically conductive coil.

A packaged module includes an electrically conductive coil and a composite magnetic molding material covering the electrically conductive coil. The magnetic molding compound includes coated magnetic particles (MB) dispersed in a composite non-magnetic material (MA). The coated magnetic particles (MB) are surface coated with an insulation coating layer (MB2) that contains elements Silicon (Si), Carbon (C), and Oxygen (O) or that contains element Si in an amount of 0.52% to 2.93% by mass with a predetermined tolerance margin of 20%.

Provided is a thermosetting resin composition containing: (A) silver particles including secondary particles having an average particle size from 0.5 to 5.0 m, the secondary particles being formed by aggregation of primary particles having an average particle size from 10 to 100 nm; and (B) a thermosetting resin.

A thermally conductive silicone-based potting composition is provided that exhibits a thermal conductivity of at least 3 W/m*K and a low viscosity across a shear range. The composition is dispensable and curable to a form-stable condition.

A semiconductor device package assembly is introduced in this disclosure. The semiconductor device assembly includes a plurality of semiconductor device packages, each one of the plurality of semiconductor device packages including a package substrate having top and bottom surfaces, one or more semiconductor dice disposed on the top surface of the package substrate, and a plurality of contact pads disposed on a bottom surface of the package substrate. The semiconductor device assembly also includes a redistribution layer (RDL) on which the plurality of semiconductor device packages are disposed, and a plurality of solder balls disposed on an RDL surface opposite where the plurality of semiconductor device packages are disposed, wherein the RDL electrically connects a first semiconductor device package and a second semiconductor device package of the plurality of semiconductor device packages to one or more of the plurality of solder balls.

According to one embodiment, a semiconductor device includes: a circuit board; a first semiconductor chip mounted on a face of the circuit board; a resin film covering the first semiconductor chip; and a second semiconductor chip having a chip area larger than a chip area of the first semiconductor chip, the second semiconductor chip being stuck to an upper face of the resin film and mounted on the circuit board. The resin film entirely fits within an inner region of a bottom face of the second semiconductor chip when viewed in a stacking direction of the first and second semiconductor chips.

A semiconductor package includes a first redistribution structure including a first redistribution layer; a semiconductor chip on a first surface of the first redistribution structure and including a connection pad electrically connected to the first redistribution layer; an encapsulant that surrounds at least a portion of the semiconductor chip; a second redistribution structure on the encapsulant and including a second redistribution layer; a through-via structure that extends through the encapsulant and electrically connects the first redistribution layer to the second redistribution layer; an organic material layer between the through-via structure and the encapsulant and having an elongation rate greater than an elongation rate of the encapsulant; and a bump structure on a second surface of the first redistribution structure.