A method of manufacture for a semiconductor package includes; forming a first wiring structure, connecting a semiconductor chip to the first wiring structure, forming a lower encapsulant on the first wiring structure to cover at least a portion of a lateral surface of the semiconductor chip, wherein the lower encapsulant does not cover an upper surface of the semiconductor chip, forming an upper encapsulant on the lower encapsulant, wherein the upper encapsulant covers the upper surface of the semiconductor chip and the upper encapsulant has a materially different composition than the lower encapsulant, and forming a second wiring structure on the upper encapsulant.

In the various aspects, a wafer protection/coating material is provided with luminescent additives and is deposited over a BGA or a plurality of solder bumps as a protective layer during a laser scribe, a laser full cut, and/or plasma singulation process. The inclusion of luminescent additives facilitates assessing, in-line, the coating quality, i.e., thickness, specifically the coverage of the wafer protection material on top of the solder bumps using luminescent detection metrology. In an aspect, the wafer protection material may be water-soluble and may be removed after the laser/plasma process step using water.

A semiconductor package may include a first redistribution substrate, a semiconductor chip on the first redistribution substrate, a mold layer provided on the first redistribution substrate to cover the semiconductor chip, a capping layer on the mold layer, a conductive post horizontally spaced apart from the semiconductor chip to penetrate the capping layer and the mold layer, and a second redistribution substrate provided on the capping layer and electrically connected to the conductive post. A thermal conductivity of the mold layer may be higher than a thermal conductivity of the capping layer.

A semiconductor device, including: a semiconductor chip; an insulated circuit substrate that has: a metal plate including a ground region on an upper surface thereof, an insulating layer disposed on the upper surface of the metal plate with the ground region exposed therefrom, and a conductive circuit pattern plate on which the semiconductor chip is mounted; a ground wiring member conductively connected to the ground region of the metal plate, the ground wiring member being conductive and including an upper end portion located above the insulated circuit substrate; and a sealing member sealing the semiconductor chip, the insulated circuit substrate and the ground wiring member, the sealing member having a sealing upper surface and including an opening formed therein to expose therethrough the upper end portion of the ground wiring member above the insulated circuit substrate.

There are provided a resin composition for semiconductor sealing, an underfill, a mold resin, and a semiconductor package that exhibit an excellent low dielectric property by a non-conventional new approach. A resin composition for semiconductor sealing according to an embodiment of the present invention is a resin composition for semiconductor sealing containing a thermosetting resin, a curing agent, an inorganic filler, and hollow resin particles, in which the hollow resin particles are contained in the resin composition for semiconductor sealing in an amount of 1% by weight to 50% by weight.

A semiconductor package includes: a package substrate; a semiconductor chip on the package substrate; a molding layer on the semiconductor chip on the package substrate; a protective layer on a first surface of the molding layer; and one or more connection terminals on a surface of the package substrate, in which an elastic modulus of the protective layer is larger than an elastic modulus of the molding layer.

Provided is a package structure including a first tier, a second tier, and a cladding layer. The first tier has a first surface and a second surface opposite to each other. The second tier is bonded to the second surface of the first tier by a plurality of conductive connectors. The cladding layer is disposed between the first tier and the second tier. The cladding layer has inner sidewalls to define a groove for accommodating the plurality of conductive connectors, and the inner sidewalls are inclined sidewalls.

A package structure is provided. The package structure includes a leadframe, an electronic component, an encapsulant, and a first reflowable material. The leadframe includes a first lead. The electronic component is disposed over and electrically connected to an upper surface of the leadframe. The encapsulant encapsulates the leadframe and defines a first opening exposing a first portion of a lower surface of the first lead. The first reflowable material is disposed in the first opening. The first opening is defined by curved surfaces of the encapsulant formed by etching the leadframe and has a cross-sectional profile tapering away from the first lead.

A die includes a substrate, a conductive pad, a connector a protection layer, and a passivation layer. The conductive pad is disposed over the substrate. The connector is disposed on the conductive pad. The connector comprises a seed layer and a conductive post on the seed layer. The protection layer laterally covers the connector. The passivation layer is disposed between the protection layer and the conductive pad. The conductive post is separated from the passivation layer and the protection layer by the seed layer.

A heat-curable resin composition contains: (A) an aliphatic biscitraconimide compound represented by formula (1) defined as:

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wherein, in the formula (1), A is a divalent aliphatic hydrocarbon group having 2 to 12 carbon atoms; and (B) an epoxy resin containing two or more epoxy groups in one molecule. The amount of the component (A) is in the range of 20 to 95% by mass based on the total amount of the aliphatic biscitraconimide compound (A) and the epoxy resin (B).