A semiconductor package includes a redistribution structure including redistribution patterns, first and second chip structures on the redistribution structure and electrically connected to the redistribution patterns, a first mold covering at least a portion of each of the first and second chip structures, an interconnection chip including interconnection patterns electrically connected to the redistribution patterns and a plurality of insulating layers having third surfaces in which respective ones of the interconnection patterns are embedded, through-vias electrically connected to the redistribution patterns, a second mold covering at least a portion of each of the through-vias and the interconnection chip. Each third surface includes a first region, and a second region between the first region and an upper surface of the respective interconnection pattern embedded in the third surface. The second region defines a step between the first region and the upper surface of the interconnection pattern embedded in the third surface.

Structures (2, 2A to 2P) according to the present disclosure have respective bases (10, 10A), electrode layers, and terminals. The bases (10, 10A) are made of a ceramic. The electrode layers (111, 111C, 111D, 111F, 111M, 111N, 111O) are located inside the respective bases (10, 10A). The terminals (41, 41G, 41H, 41I, 41J, 41K, 41L) are electrically connected to the respective electrode layers (111, 111C, 111D, 111F, 111M, 111N, 111O) at respective tip portions of the terminals. Further, the terminals (41, 41G, 41H, 41I, 41J, 41K, 41L) are in contact with the respective electrode layers (111, 111C, 111D, 111F, 111M, 111N, 111O) at respective tip surfaces and side surfaces of the terminals.

A joined body includes a first member, a second member, and a joining portion disposed therebetween and joining the first member and the second member. The joining portion includes a first joining layer on a side toward the first member and formed of a first joining material, a second joining layer on a side toward the second member and formed of a second joining material, and a metal layer therebetween and having a plurality of holes communicating with one another. The metal layer includes a first-joining-material-impregnated layer on a side toward the first joining layer and in which the plurality of holes are impregnated with the first joining material, a second-joining-material-impregnated layer on a side toward the second joining layer and in which the plurality of holes are impregnated with the second joining material, and an unfilled hole layer therebetween and in which the plurality of holes are void.

A substrate fixing device includes: a base plate; an electrostatic adsorption member that adsorbs and holds a substrate; and a first adhesive layer that adhesively bonds the electrostatic adsorption member to the base plate. A storage modulus of the first adhesive layer is not less than 0.01 MPa and not more than 25 MPa within a temperature range of 110 C. to 250 C.

A method of preparing a device coupon for a micro-transfer printing process from a multi-layered stack located on a device wafer substrate. The multi-layered stack comprises a plurality of semiconductor layers. The method comprises steps of: (a) etching the multi-layered stack to form a multi-layered device coupon, including an optical component; and (b) etching a semiconductor layer of the multi-layered device coupon to form one or more tethers, said tethers securing the multi-layered device coupon to one or more supports.

A method for manufacturing a semiconductor device, the method including irradiating a laminated body for temporary fixing with light and thereby separating the semiconductor member from a resin layer for temporary fixing. The laminated body for temporary fixing is formed by a method including: laminating a film material for temporary fixing on a light-absorbing layer in a direction in which a first principal surface is in contact with the light-absorbing layer; and peeling off a second release film from the film material for temporary fixing to expose a second principal surface. When the maximum values of logarithmic decrements of the first principal surface and the second principal surface of the resin layer for temporary fixing in rigid pendulum measurement are designated as .sub.max1 and .sub.max2, respectively, .sub.max2 is smaller than .sub.max1.

An electrostatic chuck is provided in a chamber, includes a placing surface for placing a substrate, and is able to electrostatically adsorb the substrate placed on the placing surface. An ionic liquid supply unit is able to supply an ionic liquid on the placing surface of the electrostatic chuck.

A member used in a semiconductor manufacturing apparatus includes a first member, a second member, and a sealing layer disposed between the first member and the second member. The first member has a plurality of first openings, and the second member has a plurality of second openings respectively corresponding to the plurality of first openings. The sealing layer has a plurality of through holes respectively corresponding to at least two first openings among the plurality of first openings. The at least two first openings respectively communicate with at least two corresponding second openings via the plurality of through holes.

A temporary adhesive without the formation of voids between a support and a wafer. A temporary adhesive for separatably attaching a support to a circuit side of a wafer to process a rear surface of the wafer, the temporary adhesive including a component (A) that is cured by a hydrosilylation reaction; a polymerization inhibitor (B) having a 5% mass decrease temperature of 80 C. or higher as measured using a Tg-DTA; and a solvent (C). The component (A) may include a polysiloxane (A1) including a polyorganosiloxane (a1) containing a C.sub.1-10 alkyl group and a C.sub.2-10 alkenyl group, and a polyorganosiloxane (a2) containing a C.sub.1-10 alkyl group and a hydrogen atom; and a platinum group metal-based catalyst (A2). The polymerization inhibitor (B) may be a compound of formula (1): ##STR00001##
(wherein R.sup.7 and R.sup.8 are each a C.sub.6-40 aryl group, or a combination of a C.sub.1-10 alkyl group and a C.sub.6-40 aryl group).

The present invention relates to an ultra-thin light-emitting diode (LED) electrode assembly, a manufacturing method of the ultra-thin LED electrode assembly, and a transfer film of an ultra-thin LED used for manufacturing the ultra-thin LED electrode assembly and relates to an ultra-thin LED electrode assembly in which a plurality of LED elements are simultaneously transferred using a laser-assisted multi-chip transfer printing method to form and pattern the LED elements, thereby preventing process defects caused by omission of the LED elements during transfer and deviation thereof from an electrode line, and defects such as dark spots caused in an LED display, a manufacturing method of the ultra-thin LED electrode assembly, and a transfer film of an ultra-thin LED used for manufacturing the ultra-thin LED electrode assembly.