A semiconductor device includes a substrate, a source/drain pattern on the substrate, a gate structure on the substrate, an active contact connected to the source/drain pattern, a gate contact connected to the gate structure, and a wiring structure on the active contact, where the wiring structure includes a bridge wiring layer and a plurality of conductive wiring layers, the bridge wiring layer includes an active via connected to the active contact and a gate via connected to the gate contact, and each conductive wiring layer of the plurality of conductive wiring layers includes an active via connected to the active contact, a gate via connected to the gate contact, an active line on the active via of the respective conductive wiring layer, and a gate line on the gate via of the respective conductive wiring layer.

A semiconductor device includes a lower structure including a substrate, a first interconnection layer extending in a first direction on the lower structure, and including a first metal, a first via contacting a portion of an upper surface of the first interconnection layer and including a second metal, a second via contacting at least a portion of an upper surface of the first via and having a maximum width narrower than a maximum width of the first via, and a second interconnection layer connected to the second via and extending in a second direction. The first interconnection layer has inclined side surfaces in which a width of the first interconnection layer becomes narrower towards an upper region of the first interconnection layer, and the first via has inclined side surfaces in which a width of the first via becomes narrower towards an upper region of the first via.

Semiconductor structures and methods of forming the same are provided. In one embodiment, a semiconductor structure includes an active region over a substrate, a gate structure disposed over the active region, and a gate contact that includes a lower portion disposed over the gate structure and an upper portion disposed over the lower portion.

An apparatus includes a through-silicon via (TSV) including a conductive material; a first contact plug having an upper surface and a bottom surface directly connected to an upper surface of the TSV; a first wiring directly connected to the upper surface of the first contact plug; a second wiring having an upper surface; a second contact plug having an upper surface and a bottom surface directly connected to the upper surface of the second wiring; and a third wiring directly connected to the upper surface of the second contact plug; wherein the first wiring and the third wiring are in a substantially same level.

A circuit device includes: a first substrate having a first barrier layer; a second substrate having a second barrier layer; a first conductive portion arranged over the first barrier layer; a second conductive portion arranged over the second barrier layer; a first expanding pad arranged on the first conductive portion and including a first contact area greater than that of the first conductive portion; and a second expanding pad bonded to the first expanding pad, arranged on the second conductive portion and including a second expanded contact area greater than that of the second conductive portion. The first barrier layer and the second barrier layer include aluminum fluoride.

A silicon carbide device including a trench contact structure configured to connect to a part of a transistor. The trench contact structure includes a trench having sidewalls, a silicide layer located in the trench and covering the sidewalls, and a metal contact element located in the trench and connected to the part of the transistor via the silicide layer.

An embedded inductor may include a substrate. The inductor may include a first layer of magnetic film, disposed on a first side of the substrate. The inductor may include a second layer of magnetic film, disposed on a second side of the substrate. The inductor may include a dielectric layer disposed over each of the first and second layers of magnetic film may include. The inductor may include a first redistribution layer formed over the dielectric layer. The inductor may include a second redistribution layer a formed over the dielectric layer. The inductor may include two or more through-substrate vias (TSVs) extending through the dielectric layer and the substrate from the first redistribution layer to the second redistribution layer.

Integrated circuit devices are provided. An integrated circuit device includes an insulating layer and a metal via structure that is in the insulating layer. The metal via structure has a lower portion and an upper portion that is narrower than the lower portion. Moreover, the integrated circuit device includes a metal line that is on and electrically connected to the metal via structure. Related methods of forming integrated circuit devices are also provided.

Embodiments disclosed herein include an electronic package. In an embodiment, the electronic package comprises a package substrate with a plurality of first layers, where the first layers comprise an organic material. In an embodiment, a trace is embedded in the package substrate, and a second layer is over the trace, where the second layer comprises silicon and nitrogen. In an embodiment, the second layer is chemically bonded to the one of the first layers.

A microelectronic structure with through substrate vias (TSVs) and method for forming the same is disclosed. The microelectronic structure can include a bulk semiconductor with a via structure. The via structure can have a first and second conductive portion. The via structure can also have a barrier layer between the first conductive portion and the bulk semiconductor. The structure can have a second barrier layer between the first and second conductive portions. The second conductive portion can extend from the second barrier layer to the upper surface of the bulk semiconductor. The microelectronic structure containing TSVs is configured so that the microelectronic structure can be bonded to a second element or structure.