A semiconductor structure and a method of forming is provided. The semiconductor structure includes nanostructures separated from one another and stacked over a substrate, a gate stack wrapping around the nanostructures, and a dielectric fin structure laterally spaced apart from the nanostructures by the gate stack. The dielectric fin structure include a lining layer and a fill layer nested within the lining layer. The lining layer is made of a carbon-containing dielectric material, and a carbon concentration of the lining layer varies in a direction from the gate stack to the lining layer.

Embodiments herein provide for oxygen based treatment of low-k dielectric layers deposited using a flowable chemical vapor deposition (FCVD) process. Oxygen based treatment of the FCVD deposited low-k dielectric layers desirably increases the Ebd to capacitance and reliability of the devices while removing voids. Embodiments include methods and apparatus for making a semiconductor device including: etching a metal layer disposed atop a substrate to form one or more metal lines having a top surface, a first side, and a second side; depositing a passivation layer atop the top surface, the first side, and the second side under conditions sufficient to reduce or eliminate oxygen contact with the one or more metal lines; depositing a flowable layer of low-k dielectric material atop the passivation layer in a thickness sufficient to cover the one or more metal lines; and contacting the flowable layer of low-k dielectric material with oxygen under conditions sufficient to anneal and increase a density of the low-k dielectric material.

A semiconductor device includes a gate structure on a substrate, an offset spacer adjacent to the gate structure, a main spacer around the offset spacer, a source/drain region adjacent to two sides of the main spacer, a contact etch stop layer (CESL) adjacent to the main spacer, and an interlayer dielectric (ILD) layer around the CESL. Preferably, a dielectric constant of the offset spacer is higher than a dielectric constant of the main spacer.

Examples are disclosed that relate to layered metal oxide films. One example provides a method of forming a patterning structure. The method comprises performing one or more layered film deposition cycles to form a layered film comprising a metal oxide. A layered film deposition cycle of the one or more layered deposition cycles comprises a metal oxide deposition subcycle and a silicon oxide deposition cycle. The metal oxide deposition subcycle comprises exposing the substrate to a metal-containing precursor and oxidizing metal-containing precursor adsorbed to the substrate. The silicon oxide deposition subcycle comprising exposing a substrate to a silicon-containing precursor and oxidizing silicon-containing precursor adsorbed to the substrate. The method further comprises etching one or more regions of the layered film to form the patterning structure.

A substrate processing method according to an aspect of the present disclosure includes: preparing a substrate having a silicon film on a surface thereof; and supplying chlorine gas to the substrate, thereby etching the silicon film. The etching of the silicon film includes: retaining, in a retaining portion, the chlorine gas before being supplied to the substrate, and generating chlorine radicals from the chlorine gas by irradiating, with an ultraviolet ray, the chlorine gas inside the retaining portion.