A semiconductor device includes a first lead including a base portion, a semiconductor element mounted on one side in a thickness direction of the base portion and having a first electrode disposed on the one side in the thickness direction and a second electrode disposed on the other side in the thickness direction, a second lead spaced apart from the base portion in a first direction orthogonal to the thickness direction, a first conductive member including a first portion bonded to the first electrode and a second portion bonded to the second lead and electrically connected to the first electrode and the second lead, a first bonding layer interposed between, and bonded to the base portion and the second electrode, and a second bonding layer interposed between, and bonded to the first electrode and the first portion. The first bonding layer includes a sintered metal.

An electronic device which can suppress peeling off and damaging of the bonding material is provided. The electronic device includes an electronic component, a mounting portion, and a bonding material. The electronic component has an element front surface and an element back surface separated in the z-direction. The mounting portion has a mounting surface opposed to the element back surface on which the electronic component is mounted. The bonding material bonds the electronic component to the mounting portion. The bonding material includes a base portion and a fillet portion. The base portion is held between the electronic component and the mounting portion in the z-direction. The fillet portion is connected to the base portion and is formed outside the electronic component when seen in the z-direction. The electronic component includes two element lateral surface and ridges. The ridges are intersections of the two element lateral surface and extend in the z-direction. The fillet portion includes a ridge cover portion which covers at least a part of the ridges.

A power package includes at least one power substrate having at least one power trace, at least one power device on the at least one power trace, signal terminals, and at least one signal connection assembly. The at least one signal connection assembly includes at least one of the following: at least one signal trace that is thinner than the at least one power trace; at least one embedded routing layer within the at least one power substrate; and/or at least one routing layer on the at least one power substrate.

The present disclosure proposes a semiconductor device, as well as a method for manufacturing such a semiconductor device, and related to a method of generating a dual exposed drain with common gate and source clip-bonded package for reverse battery protection. The semiconductor device includes a first lead frame with an external first lead frame terminal and a first die paddle, a second lead frame with an external second lead frame terminal and a second die paddle, a common clip with an external source clip terminal, a two source contacts, a common gate clip with an external common clip gate terminal, a clip contact and a gate clip contact, a first semiconductor die with a first die gate terminal, a first die source terminal, and a first die drain terminal, a second semiconductor die with a second die gate terminal, a second die source terminal, and a second die drain terminal.

An electric circuit body including a power semiconductor element joined to one surface of a conductor plate; a sheet member including an insulating layer joined to the other surface of the conductor plate; a sealing member that integrally seals the sheet member, the conductor plate, and the power semiconductor element in a state where a surface of the sheet member opposite to a surface joined to the conductor plate is exposed; a cooling member that cools heat of the power semiconductor element; and a heat conduction member provided between the opposite surface of the sheet member and the cooling member, where the heat conduction member is provided over a first projection region facing the conductor plate and a second projection region facing the sealing member, and a thickness of the heat conduction member is thicker in the second projection region than in the first projection region.

An object is to provide a technique capable of easily taking out a submodule from a semiconductor device to reuse the submodule. The semiconductor device includes: a submodule in which a conductive plate and a semiconductor element mounted to an upper surface of the conductive plate via a first bonding material are sealed with a first sealing material; an insulating substrate bonded to a lower surface of the submodule via a second bonding material; a case surrounding a periphery of the insulating substrate and the submodule; and a second sealing material sealing a region surrounded by the case so that at least an upper surface of the submodule is exposed.

According to one embodiment, a semiconductor device includes the following structure. The semiconductor chip is provided between first and second conductors. A joint component is provided between the chip and the second conductor. The thin film is provided on the second conductor and contains a material different from a material of the joint component. The second conductor includes first, second and third plates. The first plate extends in a first direction along a first surface of the chip and is connected to the chip via the joint component. The second plate extends from the first plate obliquely with respect to the first direction. The third plate extends from the second plate in the first direction. The thin film is arranged on a surface of the second plate continuous from a surface on which the joint component is provided.

A semiconductor device includes a semiconductor element having a first electrode and a second electrode, a first conductive member being located on a first side in a thickness direction with respect to the first electrode and having a first reverse surface to face a second side in the thickness direction, a second conductive member being located on the first side in the thickness direction with respect to the second electrode and having a second reverse surface to face the second side in the thickness direction, a first conductive bonding material interposed between the first electrode and the first reverse surface and bonded to the first electrode and the first conductive member, and a second conductive bonding material interposed between the second electrode and the second reverse surface and bonded to the second electrode and the second conductive member. An area of the second reverse surface is smaller than an area of the first reverse surface. A distance between the second electrode and the second reverse surface in the thickness direction is smaller than a distance between the first electrode and the first reverse surface in the thickness direction.

A metal clip disposed on chips to connect the chips to each other, includes a plurality of bonding parts each having a lower surface configured to bond to an upper surface of each of the chips; and an outer side part formed at each of the bonding parts to extend upward from at least a portion of an outer side of respective ones of the bonding parts to form a step therefrom.

A method of manufacturing a device package. The method comprises patterning a first substrate to form patterned regions comprising a thermal oxide layer. The method further comprises directly bonding the patterned regions of the first substrate to a second substrate to form a bonding interface. The bonded first and second substrates form an integrated cooling assembly comprising a coolant chamber volume. Portions of the first substrate exposed to the coolant chamber volume comprise a native oxide layer.