In one example, an electronic device include a substrate with a die paddle and a contact. An electronic component is coupled to the die paddle. A conductive connect includes a foot portion coupled to the contact and a connect plate portion coupled to the electronic component. The foot portion includes a top side, a bottom side, and an outward lateral side. A chamfer extends inward from the outward lateral side and extends to the bottom side. A conductive adhesive couples the foot portions to contact and covers the chamfer and the bottom side. An encapsulant covers the electronic component, the conductive connect, and at least portions of the substrate. The chamfer improves the bonding integrity between the conductive connect and the substrate. Other examples and related methods are also disclosed herein.

A semiconductor device includes a semiconductor chip having a first chip surface and a second chip surface, and a connector member having a bonding portion that faces the first chip surface and a connection portion. The connection portion is connected to an end portion of the bonding portion on one side in a second direction, and located on the other side in a first direction toward one side in the second direction. The bonding portion has a first bonding surface bonded to the first chip surface. A first recessed portion that is recessed on one side in the first direction and is open to the other side in the second direction is provided in the first bonding surface. A dimension of the first recessed portion in the second direction is 40% or more and 60% or less of a dimension of the bonding portion in the second direction.

A semiconductor chip has a first semiconductor layer, a second semiconductor layer formed on an upper surface of the first semiconductor layer, and a semiconductor region formed in the second semiconductor layer. A trench is formed in the semiconductor region. An insulating film is formed on each of an upper surface of the second semiconductor layer and an inner surface of the trench. A polysilicon film is formed on the insulating film so as to embed an inside of the trench. A front surface electrode made of metal is formed on the polysilicon electrode, and a back surface electrode made of metal is formed on a lower surface of the first semiconductor layer. An impurity concentration of the second semiconductor layer located between the semiconductor region and the first semiconductor layer is lower than an impurity concentration of each of the first semiconductor layer and the semiconductor region.

A semiconductor chip includes a first electrode provided farther in a first direction than the first lead frame and is electrically coupled to a first lead frame, and a second electrode. A first conductor electrically coupled to the second electrode. A second lead frame is aligned with the first lead frame at a position farther in a second direction than the first lead frame and includes a first terminal and a plate portion connected to the first terminal. The plate portion is electrically coupled to the first conductor and has an inclination over a first surface on a side in the first direction and a first side surface on a side in the second direction. A resin covers a part of the first lead frame, the semiconductor chip, the first conductor, and the plate portion and a part of the first terminal.

A transistor package includes a transistor chip having opposing first and second main sides, and a first load electrode and a second load electrode on the first main side, with a carrier facing the second main side. A first terminal post is arranged laterally beside the transistor chip. A second terminal post is arranged laterally beside the transistor chip on an opposite side. A first clip connects the first load electrode to the first terminal post. A second clip connects the second load electrode to the second terminal post. At least one of the clips includes a first contact element which projects from a first side wall of the clip and is bent downwards in a direction towards the transistor chip to electrically contact the first or second load electrode of the chip, a bending axis being in a longitudinal direction of the clip.

A reliability of a semiconductor device can be improved by measuring a value of a current flowing through a power transistor accurately. A semiconductor chip includes a power transistor and a source electrode electrically connected to a source region of the power transistor. The source electrode and a lead terminal are electrically connected to each other via a wire. The source electrode includes detection points for detecting the value of the current flowing through the power transistor. The detection points are arranged so as to sandwich a bonding point of the wire bonded to the source electrode.

A semiconductor package includes a transistor chip having first and second opposite facing sides. The semiconductor transistor chip includes a first load electrode and a second load electrode on the first side. The package includes a carrier facing the second side of the chip, a first terminal post laterally beside the transistor chip and a second terminal post laterally beside the transistor chip. The second terminal post is a part of the carrier or physically connects to the carrier. A first clip connects the first load electrode to the first terminal post. A second clip connects the second load electrode to the second terminal post. An upper surface of the first terminal post and an upper surface of the second terminal post are arranged at different levels of height. The first clip and the second clip are of same shape.

An electronic component is disclosed. In one example, the electronic component comprises a semiconductor body, an active region in the semiconductor body, at least one metallization structure arranged on or above the active region and comprising a stack. The stack includes a barrier structure, an intermediate structure on the barrier structure and comprising nickel, and a copper and/or aluminium structure on the intermediate structure and comprising copper and/or aluminium. A dielectric structure is connected to a sidewall of the stack.

An electronic device may include an electrically conductive base, an electrically insulative layer attached to the base, and first and second exterior terminals at an exterior surface. A first electrical conductor may be attached to the electrically insulative layer and electrically connected to the first exterior terminal. A semiconductor die may have a first contact at a bottom surface electrically connected to the first electrical conductor, and a second contact at a top surface. A second electrical conductor may be attached to the top surface of the semiconductor die and may be electrically connected to the second exterior terminal. An encapsulant may at least partially encapsulate the electrically conductive base, the first and second exterior terminals, the electrically insulative layer, the first electrical conductor, the semiconductor die, and the second electrical conductor.

A semiconductor device includes a semiconductor element, a first lead, and a sealing resin. The first lead includes a die pad portion including a first lead reverse surface, and a first terminal portion. The sealing resin includes a second resin surface facing in a z direction and a third resin surface facing in an x direction. The first lead includes a metal layer. The first lead reverse surface is exposed from the second resin surface. The first terminal portion includes a first-terminal base portion and a first-terminal tip portion. The first-terminal base portion passes through the third resin surface, and is spaced apart from a first resin surface in the z direction. The first-terminal tip portion is located below the first-terminal base portion. The first-terminal tip portion includes a tip surface exposed from the metal layer, and a recessed surface covered with the metal layer.