A semiconductor device includes: a first semiconductor layer that has a first surface and a second surface facing the first surface in a first direction, contains recombination centers, and has a first conductivity type; and a second semiconductor layer that is adjacent to the second surface and has a second conductivity type which is opposite to the first conductivity type. Local maxima appear in a distribution of a concentration of the recombination centers in the first direction at at least one position between the first surface and the second surface and away from either of the first surface and the second surface.

An array of semiconductor fins is formed on a top surface of a substrate. A dielectric material liner is formed on the surfaces of the array of semiconductor fins. A photoresist layer is applied and patterned such that sidewalls of an opening in the photoresist layer are parallel to the lengthwise direction of the semiconductor fins, and are asymmetrically laterally offset from a lengthwise direction passing through the center of mass of a semiconductor fin to be subsequently removed. An angled ion implantation is performed to convert a top portion of dielectric material liner into a compound material portion. The compound material portion is removed selective to the remaining dielectric material liner, and the physically exposed semiconductor fin can be removed by an etch or converted into a dielectric material portion by a conversion process. The dielectric material liner can be removed after removal of the semiconductor fin.

A semiconductor device has a substrate and semiconductor layer formed over the substrate. A trench is formed through the semiconductor layer. A polysilicon material is disposed in the trench. A first column of semiconductor material having a first conductivity type extends through the semiconductor layer adjacent to the trench. A second column of semiconductor material having a second conductivity type extends through the semiconductor layer adjacent to the first column of semiconductor material. A conductive layer is formed over the semiconductor layer. The polysilicon material is coupled to the conductive layer and operates as a field plate. A first insulating layer is formed between the polysilicon material and a side surface of the trench. A source region is formed within the semiconductor layer. A gate region is formed adjacent to the insulating layer. A second insulating layer is formed between the gate region and source region.

A semiconductor device includes a gate structure, a drift region, a source region, a drain region, a first doped region, and a second doped region. The gate structure is over a semiconductor substrate. The drift region is in the semiconductor substrate and laterally extends past a first side of the gate structure. The source region is in the semiconductor substrate and adjacent a second side of the gate structure opposite the first side. The drain region is in the drift region. The first doped region is in the drift region and between the drain region and the gate structure. The second doped region is within the drift region. The second doped region forms a P-N junction with the first doped region at a bottom surface of the first doped region.

A semiconductor device includes: a drift region of a first conductivity type between first and second surfaces of a semiconductor body; a first region of a second conductivity type at the second surface; and a field stop region of the first conductivity type between the drift region and first region. The field stop region includes first and second sub-regions with hydrogen related donors. A p-n junction separates the first region and first sub-region. A concentration of hydrogen related donors, along a first vertical extent of the first sub-region, steadily increases from the pn-junction to a maximum value, and steadily decreases from the maximum value to a value at a first transition between the sub-regions. A second vertical extent of the second sub-region ends at a second transition to the drift region where the concentration of hydrogen related donors equals 10% of the value at the first transition.

Disclosed is a silicon carbide MOSFET device and a manufacturing method thereof. The manufacturing method comprises: forming a source region in an epitaxial layer; forming a body region in the epitaxial layer; forming a gate structure, comprising a gate dielectric layer, a gate conductor layer and an interlayer dielectric layer; forming an opening in the interlayer dielectric layer to expose the source region; forming a source contact connected to the source region via the opening, wherein an ion implantation angle of the ion implantation process is controlled to make a transverse extension range of the body region larger than a transverse extension range of the source region, so that a channel that extends transversely is formed by a portion, which is peripheral to the source region, of the body region, and at least a portion of the gate conductor layer is located above the channel.

In a method of manufacturing a semiconductor device, a first-conductivity type implantation region is formed in a semiconductor substrate, and a carbon implantation region is formed at a side boundary region of the first-conductivity type implantation region.

An integrated circuit includes a dielectric isolation structure formed at a surface of a semiconductor substrate and a polysilicon resistor body formed on the dielectric isolation structure. The polysilicon resistor body includes an N-type dopant having an N-type dopant concentration, nitrogen having a nitrogen concentration, and carbon having a carbon concentration. The sheet resistance of the resistor body is greater than 5k/square.

A method for forming a semiconductor wafer includes providing a substrate wafer, in which the substrate wafer has a bow value that is non-zero and has a first portion, the first portion has a first surface and a second surface opposite to the first surface, and the first surface is concave. The method further includes performing a first ion implantation process to the substrate wafer, such that the first surface of the first portion has a first implantation region, and the bow value of the substrate wafer is closer to zero after performing the first ion implantation process than before performing the first ion implantation process. The method further includes depositing an epitaxial layer on the substrate wafer after performing the first ion implantation process.

A trench junction field effect transistor (trench JFET) includes a mesa region confined by first and second trenches along a first lateral direction. The first and second trenches extend into a semiconductor body from a first surface of the semiconductor body. A mesa channel region of a first conductivity type is confined, along the first lateral direction, by first and second gate regions of a second conductivity type. A first pn junction is defined by the mesa channel region and the first gate region. A second pn junction is defined by the mesa channel region and the second gate region. The mesa channel region includes, along the first lateral direction, first, second and third mesa channel sub-regions having a same extent along the first lateral direction.