In some embodiments, methods are provided for simultaneously and selectively depositing a first material on a first surface of a substrate and a second, different material on a second, different surface of the same substrate using the same reaction chemistries. For example, a first material may be selectively deposited on a metal surface while a second material is simultaneously and selectively deposited on an adjacent dielectric surface. The first material and the second material have different material properties, such as different etch rates.

Methods for selective deposition of silicon oxide films on metal or metallic surfaces relative to dielectric surfaces are provided. A dielectric surface of a substrate may be selectively passivated relative to a metal or metallic surface, such as by exposing the substrate to a silylating agent. Silicon oxide is then selectively deposited on the metal or metallic surface relative to the passivated oxide surface by contacting the metal surface with a metal catalyst and a silicon precursor comprising a silanol.

A method is presented for selective deposition on metals using porous low-k materials. The method includes forming alternating layers of a porous dielectric material and a first conductive material, forming a surface aligned monolayer (SAM) over the first conductive material, depositing hydroxamic acid (HA) material over the porous dielectric material, growing an oxide material over the first conductive material, removing the SAM, depositing a dielectric layer adjacent the oxide material, and replacing the oxide material with a second conductive material defining a bottom electrode.

Multigate devices having bottom insulation and methods of fabrication thereof are disclosed. An exemplary method includes forming a first source/drain recess in a first device region, forming a second source/drain recess in a second device region, forming a first source/drain structure in the first source/drain recess, and forming a second source/drain structure in the second source/drain recess. Forming the second source/drain structure includes forming an insulator layer in the second source/drain recess, forming a mask over the first source/drain structure after performing a first nitrogen thermal treatment on the insulator layer, and forming a doped semiconductor layer over the insulator layer after performing a second nitrogen thermal treatment on the mask. The first nitrogen thermal treatment may increase a thickness and/or reduce an etch rate of the insulator layer. The first device region may be a p-type transistor region, and the second device region may be an n-type transistor region.