Patent classifications
H10P14/46
SURFACE PROCESSING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A surface processing method for forming a plating film on a metal layer in manufacturing a semiconductor device. The method includes: as a first precipitation process, immersing the metal layer in a first solution containing a second metal that is more noble than a first metal of the metal layer, to thereby precipitate a metal film containing the second metal on the metal layer; and as a second precipitation process, performing an electroless plating treatment to replace the second metal in the metal film with a third metal contained in a second solution and to precipitate the plating film containing the third metal on the metal layer. The metal layer includes a first portion and a second portion mutually exclusive of each other. In the first precipitation process, a concentration of the first solution is lower at a surface of the second portion than at that of the first portion.
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A method for manufacturing a semiconductor device of an embodiment includes a first film forming step of forming a first electrode layer on a base material back surface facing a side opposite to a device surface of a base material on which a circuit portion is formed. The method includes a second film forming step of forming a second electrode layer on a front surface of a film-formed member. The method includes a joining step of joining the first electrode layer and the second electrode layer. The method includes a film-formed member removing step of removing the film-formed member from the second electrode layer.
SILICON INTERPOSER WITH INTEGRATED FINE-PITCH WAFER TEST PROBES
A wafer test probe includes a pillar, a conductive line isolated from and extending through the pillar, a probe tip forming an opening, and a first conductive coating isolated from the pillar to coat the probe tip at least at the opening. The probe time includes blade features disposed in electrical contact with the conductive line via the first conductive coating. The blade features terminate at the opening and are configured to conductively penetrate a solder bump. A second conductive coating is disposed over the first conductive coating to coat the blade features.
Selective Directed Assembly-Based Printing of Metal Oxide Dielectric Thin Films
A method for selectively printing metal oxide dielectric films using directed fluidic assembly is provided. The metal oxide films are printed from a liquid suspension of nanoparticulate precursors using a dip coating mechanism. The resulting films can be fully cured at about 100 C. in conjunction with UV photoannealing. The printed metal oxide films can serve as the dielectric material for a variety of passive and active electronic devices. The method reduces cost and energy consumption for the fabrication of electronic devices, and can be used to fabricate devices on flexible polymer substrates.
ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF
A manufacturing method of an electronic device is provided by the present disclosure. The manufacturing method includes providing a target substrate, and disposing a circuit structure on the target substrate. The process of providing the target substrate includes following steps: (a) providing a base layer; (b) performing a flattening step on the base layer, and then measuring a first thickness variation of the base layer; (c) disposing two planarization layers respectively at two sides of the base layer to form the target substrate; and (d) measuring a second thickness variation of the target substrate, wherein the second thickness variation is less than the first thickness variation.
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes: forming a silicon oxide film covering each of a first main surface and a second main surface of a semiconductor substrate; forming a redistribution wiring on the first main surface side of the semiconductor substrate; and grinding the second main surface of the semiconductor substrate. This grinding step is performed in a state in which a thickness of the silicon oxide film positioned on the second main surface is equal to or larger than 10 nm and equal to or smaller than 30 nm.