A method of manufacturing a semiconductor package includes the following steps. A first integrated circuit is encapsulated by a first encapsulant. A first passivation layer is formed over the first integrated circuit and the first encapsulant. A first thermal pattern is formed in the first passivation layer. A second passivation layer is formed on the first passivation layer and the first thermal pattern, wherein the first thermal pattern is exposed by a first opening of the second passivation layer. A second integrated circuit is adhered to the second passivation layer through an adhesive layer, wherein the adhesive layer is partially disposed in the first opening of the second passivation layer.

A method includes positioning a discrete component assembly on a support fixture of a component transfer system, the discrete component assembly including a dynamic release tape including a flexible support layer, and a dynamic release structure disposed on the flexible support layer, and a discrete component adhered to the dynamic release tape. The method includes irradiating the dynamic release structure to release the discrete component from the dynamic release tape.

Semiconductor wafers and methods of fabricating the same are provided. An example semiconductor wafer has multiple die regions separated by a die spacing region and includes a wafer substrate, multiple dies disposed over the wafer substrate, and multiple buried sacrificial structures corresponding to the multiple dies. Each die is located in the corresponding die region and further includes a die substrate, an integrated circuit (IC) device disposed in the die substrate, and a multi-layer interconnect structure disposed on the IC device. The buried sacrificial structure is surrounding the die substrate and disposed between the die and the wafer substrate. The buried sacrificial structure further includes a bottom portion disposed in the die region and a side portion circumferentially connected to the bottom portion. The side portion is located in the die spacing region surrounding the corresponding die and disposed on the sidewall of the die substrate.

A method for producing a laminated film for temporary fixation of a semiconductor member to a support member includes providing a first curable resin layer on one surface of a metal foil and providing a second curable resin layer on the other surface of the metal foil to obtain the laminated film. A laminated film used for temporarily fixing a semiconductor member to a support member includes a first curable resin layer, a metal foil, and a second curable resin layer laminated in sequence.

A method is of manufacturing a plurality of devices by dividing a device wafer along a plurality of planned dividing lines intersecting each other, the device wafer having a device surface on which each of the devices is formed in each of regions partitioned by the planned dividing lines. The method includes: directly bonding a carrier plate to the device surface of the device wafer; after the bonding of the carrier plate, dicing the device wafer supported by the carrier plate along the planned dividing lines to thereby form a plurality of devices; and after the forming of the plurality of devices, separating the plurality of devices from the carrier plate.

A polyimide precursor composition according to an exemplary embodiment includes an imide precursor having an organic group derived from a cyclic ether group-containing compound. A polyimide film formed using the polyimide precursor composition has improved heat resistance and mechanical properties, and has high absorbance in a wavelength range in an ultraviolet region.

A chip based on a low-modulus supramolecular coating material includes a chip body and a low-modulus supramolecular coating provided on one side of the chip away from a growth substrate, wherein the chip body is of a cylindrical or columnar structure, the low-modulus supramolecular coating is completely or partially coated on a surface of the chip, and an area of the low-modulus supramolecular coating is less than or equal to an area of the chip body. The transfer substrate includes a substrate and a low-modulus supramolecular coating, wherein the low-modulus supramolecular coating is patterned and modified on a surface of the substrate to form a plurality of transfer sites, and a position and a size of each transfer site correspond to distribution and sizes of the transferred chips. The present application addresses problems such as complicated structures, relatively low transfer efficiency, poor precision and vulnerability of the transferred chips.

This disclosure is related to integrating pixelated microdevices into a system substrate to develop a functional system such as display, sensors, and other optoelectronic devices. The process may involve having a structure of release layers in the housing and then using different decoupling mechanisms for release. The release layers are not limited to but can be a combination of chemical or optical or mechanical release layers.

An electronic structure includes: a substrate having a first surface; a functional element unit including a functional element having an electronic function, and a protector covering the functional element, the functional element unit having a second surface facing the first surface; a support disposed between the first surface and the second surface, the support supporting the second surface; and a projection disposed on a first surface side of the substrate, the projection projecting toward the functional element unit. The support has a third surface in contact with the second surface of the functional element unit, the third surface having an area smaller than an area of the second surface. The projection has a fourth surface in contact with or close to the functional element unit, the fourth surface having an area smaller than the area of the second surface, the projection being formed by a different material from the support.

A wafer transfer method for forming a second work unit by transferring a wafer of a first work unit including a first ring frame, a first adhesive tape, and the wafer to a second adhesive tape includes sandwiching a claw body between the first ring frame and a second ring frame, affixing the second adhesive tape to a surface of the wafer which surface is not affixed to the first adhesive tape, holding the wafer by the second ring frame via the second adhesive tape, and peeling off the first adhesive tape from the wafer.