H10P72/744

DIE ATTACH FILM INDIVIDUALIZATION BEFORE WAFER DICING
20260040856 · 2026-02-05 ·

An electronic device includes a conductive lead, a semiconductor die, a package structure enclosing the semiconductor die and a portion of the conductive lead, and a non-conductive die attach film extending between the conductive lead and the semiconductor die, with a lateral side of the semiconductor die extending beyond an end of the die attach film by a non-zero gap distance. A method of fabricating an electronic device includes performing a first singulation process that separates portions of a die attach film on a wafer, performing a second singulation process that separates a semiconductor die from the wafer having a portion of the die attach film, and attaching the semiconductor die to a lead frame with the die attach film extending between a prospective lead portion and the side of the semiconductor die.

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE

Provided are a semiconductor package, in which an underfill material may enter a gap easily, and a method of manufacturing the semiconductor package. Here, the semiconductor package has a die and a plurality of pillars disposed on one surface of the die, and a thickness of the die corresponding to a region having pillars on the one surface of the die is less than a thickness of the die corresponding to a region without pillars on the one surface of the die.

Semiconductor Device and Method of Making a Fan-Out Quilt Package

A semiconductor device has a substrate formed on a first carrier. A semiconductor die is mounted on the substrate. An interconnect structure is formed on a second carrier. A copper pillar is formed on the substrate or interconnect structure. The interconnect structure is disposed over the substrate with the copper pillar and semiconductor die between the substrate and interconnect structure. The first carrier and second carrier are removed after disposing the interconnect structure over the substrate. A system-in-package (SiP) is mounted to the substrate opposite the semiconductor die after removing the first carrier.

Manufacturing method of chip-attached substrate and substrate processing apparatus

A manufacturing method of a chip-attached substrate includes preparing a stacked substrate including multiple chips, a first substrate to which the multiple chips are temporarily bonded, and a second substrate bonded to the first substrate with the multiple chips therebetween; and separating the multiple chips bonded to the first substrate and the second substrate from the first substrate to bond the multiple chips to one surface of a third substrate including a device layer.

Temporary fixation layered film and production method therefor, temporary fixation layered body, and semiconductor device production method

A method for producing a laminated film for temporary fixation of a semiconductor member to a support member includes providing a first curable resin layer on one surface of a metal foil and providing a second curable resin layer on the other surface of the metal foil to obtain the laminated film. A laminated film used for temporarily fixing a semiconductor member to a support member includes a first curable resin layer, a metal foil, and a second curable resin layer laminated in sequence.

MANUFACTURING METHOD
20260068575 · 2026-03-05 ·

A method is of manufacturing a plurality of devices by dividing a device wafer along a plurality of planned dividing lines intersecting each other, the device wafer having a device surface on which each of the devices is formed in each of regions partitioned by the planned dividing lines. The method includes: directly bonding a carrier plate to the device surface of the device wafer; after the bonding of the carrier plate, dicing the device wafer supported by the carrier plate along the planned dividing lines to thereby form a plurality of devices; and after the forming of the plurality of devices, separating the plurality of devices from the carrier plate.

PROCESSING STACKED SUBSTRATES
20260068566 · 2026-03-05 ·

Representative implementations provide techniques for processing integrated circuit (IC) dies and related devices, in preparation for stacking and bonding the devices. The disclosed techniques provide removal of processing residue from the device surfaces while protecting the underlying layers. One or more sacrificial layers may be applied to a surface of the device during processing to protect the underlying layers. Processing residue is attached to the sacrificial layers instead of the device, and can be removed with the sacrificial layers.

Method of preparing a structured substrate for direct bonding

A method of preparing a structured substrate of interest including the following steps: providing a substrate of interest including a thin film, onto which a protective layer has been bonded by direct bonding, depositing a resin, and etching the thin film and a portion of the support substrate through openings in the resin, to form pads, bonding a temporary substrate to the substrate of interest, then separating them, whereby the protective layer is separated from the substrate of interest, the resin being removed prior to the bonding step or during the separation, the protective layer/thin film adhesion energy being lower than the temporary substrate/protective layer adhesion energy or than the resin/protective layer adhesion energy.

Polyimide precursor composition, polyimide film formed from the same and method of manufacturing semiconductor device using the same

A polyimide precursor composition according to an exemplary embodiment includes an imide precursor having an organic group derived from a cyclic ether group-containing compound. A polyimide film formed using the polyimide precursor composition has improved heat resistance and mechanical properties, and has high absorbance in a wavelength range in an ultraviolet region.

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
20260076227 · 2026-03-12 ·

A method includes: forming an interposer die using a substrate, the interposer die including a plurality of conductive vias in the substrate; bonding the interposer die to a first redistribution layer (RDL); encapsulating the interposer die; forming a second RDL over the interposer die on a side opposite to the first RDL; bonding a first semiconductor die with one of the first RDL and the second RDL; and encapsulating the first semiconductor die.