Provided is a production method for an optical semiconductor element with a high yield by preventing wafer damage caused by grinding. A production method for an optical semiconductor element comprises: a step of forming a laminate of compound semiconductor layers on one main surface of a compound semiconductor substrate having cleavability; and a grinding step of grinding the other main surface of the compound semiconductor substrate, wherein a skewness (Ssk) in surface roughness measurement of a ground surface of the compound semiconductor substrate immediately after the grinding step is positive.

Provided is a substrate processing method, the method including: a substrate polishing operation of polishing a substrate; after the polishing operation, a treatment solution supplying operation of supplying a treatment solution containing a polymer and a volatile solvent onto the rotating substrate; after the treatment solution supplying operation, a liquid film forming operation of volatilizing the volatile solvent in the treatment solution to form a liquid film; and after the liquid film forming operation, an edge removing operation of removing the liquid film formed on an edge portion of the substrate and the edge portion of the substrate.

A polishing pad includes a textured polishing layer comprising a working surface and a second surface opposite the working surface. The textured polishing layer comprises a polymeric blend comprising thermoplastic urethane in an amount of between 40 and 95 wt. %, and styrenic copolymer in an amount of between 5 and 60 wt. %, based on the total weight of the textured polishing layer.

In a method for preparing silicon-on-insulator, the first etching stop layer, the second etching stop layer, and the device layer are formed bottom-up on the p-type monocrystalline silicon epitaxial substrate, where the first etching stop layer is made of intrinsic silicon, the second etching stop layer is made of germanium-silicon alloy, and the device layer is made of silicon. After oxidation, bonding, reinforcement, and grinding treatment, selective etching is performed. Through a first selective etching to p+/intrinsic silicon, the thickness deviation of the first etching stop layer on the second etching layer is controlled within 100 nm, and then through the second etching and the third etching, the thickness deviation and the surface roughness of the finally prepared silicon-on-insulator film can be optimized to less than 5 nm and less than 4 , respectively, so as to realize the flatness of the silicon-on-insulator film.

A semiconductor package includes a first die having a first substrate, an interconnect structure overlying the first substrate and having multiple metal layers with vias connecting the multiple metal layers, a seal ring structure overlying the first substrate and along a periphery of the first substrate, the seal ring structure having multiple metal layers with vias connecting the multiple metal layers, the seal ring structure having a topmost metal layer, the topmost metal layer being the metal layer of the seal ring structure that is furthest from the first substrate, the topmost metal layer of the seal ring structure having an inner metal structure and an outer metal structure, and a polymer layer over the seal ring structure, the polymer layer having an outermost edge that is over and aligned with a top surface of the outer metal structure of the seal ring structure.

A wafer processing method for removing a chamfered portion of a first wafer that includes producing a provisionally bonded wafer in which first and second wafers are weakly bonded; forming a ring-shaped modified layer by applying a laser beam to an inner side adjacent to a chamfered portion formed at an outer periphery of the first wafer of the provisionally bonded wafer, and detaching the chamfered portion from the second wafer, with the modified layer serving as a starting point; and producing a completely strongly bonded wafer by annealing the provisionally bonded wafer. The wafer processing method further includes grinding and thinning the first wafer, with the second wafer being held on a chuck table constituting a grinding apparatus, and removing the chamfered portion of the first wafer that is detached from the second wafer, with the modified layer serving as a starting point.

A method for grinding a workpiece with a grinding apparatus including a holding table with a rotatable conical-shaped holding surface, a grinding unit including a spindle and grindstones, which grinds the workpiece by bringing the rotating grindstones into contact with the workpiece to thereby form a grinding surface lying along the holding surface, and a moving unit that moves the holding table and the grindstones relative to each other. The method includes holding the workpiece on the holding surface, grinding the workpiece by performing grinding feed where the holding table and the spindle approach each other along a rotational axis of the spindle with the workpiece and the grindstones contacting each other while the holding table and the spindle are independently rotated, and, after grinding the workpiece, stopping the grinding feed and moving the holding table and the spindle relative to each other while rotating the table and the spindle.

A chemical mechanical polishing (CMP) pad includes a polishing surface including a first region including a hydrophobic character and a second region including a hydrophilic character. A method of manufacturing a CMP pad includes forming a polishing surface of the CMP pad to include a first region including a hydrophobic character and a second region including a hydrophilic character. A method of manufacturing a semiconductor device includes polishing a wafer by pressing a surface of the wafer against a polishing surface of a CMP pad while rotating both the wafer and the CMP pad, and supplying a slurry on the polishing surface of the CMP pad.