A method includes etching a mandrel layer to form mandrel strips, and selectively depositing metal lines on sidewalls of the mandrel strips. During the selective deposition, top surfaces of the mandrel strips are masked by dielectric masks. The method further includes removing the mandrel layer and the dielectric masks, filling spaces between the metal lines with a dielectric material, forming via openings in the dielectric material, with top surfaces of the metal lines exposed to the via openings, and filling the via openings with a conductive material to form vias.

In some embodiments, the present disclosure relates to an integrated chip that includes a first nanosheet field effect transistor (NSFET). The first NSFET includes a first nanosheet channel structure arranged over a substrate, a second nanosheet channel structure arranged directly over the first nanosheet channel structure, and a first gate electrode structure. The first and second nanosheet channel structures extend in parallel between first and second source/drain regions. The first gate electrode structure includes a first conductive ring and a second conductive ring that completely surround outer sidewalls of the first nanosheet channel structure and the second nanosheet channel structure, respectively, and that comprise a first material. The first gate electrode structure also includes a passivation layer that completely surrounds the first and second conductive rings, is arranged directly between the first and second nanosheet channel structures, and comprises a second material different than the first material.

An annealing system is provided that includes a chamber body that defines a chamber, a support to hold a workpiece and a robot to insert the workpiece into the chamber. The annealing system also includes a first gas supply to provide a hydrogen gas, a pressure source coupled to the chamber to raise a pressure in the chamber to at least 5 atmospheres, and a controller configured to cause the robot to transport a workpiece having a metal film thereon into the chamber, where the metal film contains fluorine on a surface or embedded within the metal film, to cause the first gas supply to supply the hydrogen gas to the chamber and form atomic hydrogen therein, and to cause the pressure source to raise a pressure in the chamber to at least 5 atmospheres while the workpiece is held on the support in the chamber.

An annealing system is provided that includes a chamber body that defines a chamber, a support to hold a workpiece and a robot to insert the workpiece into the chamber. The annealing system also includes a first gas supply to provide a hydrogen gas, a pressure source coupled to the chamber to raise a pressure in the chamber to at least 5 atmospheres, and a controller configured to cause the robot to transport a workpiece having a metal film thereon into the chamber, where the metal film contains fluorine on a surface or embedded within the metal film, to cause the first gas supply to supply the hydrogen gas to the chamber and form atomic hydrogen therein, and to cause the pressure source to raise a pressure in the chamber to at least 5 atmospheres while the workpiece is held on the support in the chamber.

A method of forming a surface treatment film on a substrate having, on a surface thereof, a first region where an insulator is exposed and a second region where at least one metallic matter is exposed, in which the surface treatment film is formed on the second region and is capable of suppressing intrusion of the surface treatment film onto the first region. A method of forming a surface treatment film, including preparing the substrate, oxidizing a surface of the second region, and forming a surface treatment film on the second region by exposing a surface of the substrate after the oxidation to a surface-treatment agent including a thiol having 8 or less carbon atoms.

A thin film deposition method may include preparing a substrate structure having an opening region formed in a vertical direction and a plurality of holes formed in a horizontal direction in each of two side portions exposed by the opening region, and adsorbing an inhibitor to surfaces of the substrate structure so that an adsorption density of the inhibitor outside of the plurality of holes is higher than an adsorption density inside of the plurality of holes by adsorbing the inhibitor in a deposition environment in which a gas diffusivity is larger in the vertical direction than in the horizontal direction. A deposition process of a material film on the inside and outside of the plurality of holes is then performed, wherein a deposition rate of the material film may vary according to the adsorption density of the inhibitor.

The disclosed technology generally relates to forming thin films, and more particularly to high quality, conformal thin films using relatively low amounts of precursor gas, and methods of forming the same. In one aspect, a method of forming a thin film comprises exposing the substrate to one or more vapor deposition cycles in a reaction chamber, wherein exposing the substrate to each vapor deposition cycle comprises exposing the substrate to a first precursor and a second precursor, wherein exposing the substrate to the first precursor and the second precursor is carried out without evacuating to remove a substantial amount of either of the first precursor or the second precursor during and between exposing the substrate to the first precursor and exposing the substrate the second precursor.

A method of fabricating a semiconductor device is provided. The method includes: loading a substrate into a substrate processing apparatus; and processing the substrate, using the substrate processing apparatus. The processing the substrate includes: providing a process gas; generating a process etchant from the process gas, using plasma ignition, the process etchant including a first etchant and a second etchant; processing the substrate, using the process etchant; identifying a composition rate of the process etchant; and controlling the processing of the substrate based on a process result according to the composition rate of the process etchant.

A method of forming and post-treating a metal silicide layer in a semiconductor structure includes performing a silicide deposition process, in which a metal silicide layer is deposited on a substrate, performing a chemical vapor deposition (CVD) soak process in which the metal silicide layer is exposed to a nitrogen (N)-containing liquid precursor, forming a metal silicide nitride layer, and performing a cap deposition process, in which a cap layer is deposited on the metal silicide nitride layer.

Various embodiments include methods and apparatuses to moisturize a substrate prior to an electrochemical deposition process. In one embodiment, a method to control substrate wettability includes placing a substrate in a pre-treatment chamber, controlling an environment of the pre-treatment chamber to moisturize a surface of the substrate; and placing the substrate into a plating cell. Other methods and systems are disclosed.