H10P14/3408

Silicon carbide epitaxial substrate and method of manufacturing silicon carbide epitaxial substrate

A silicon carbide epitaxial substrate according to the present disclosure includes: a silicon carbide substrate; a first silicon carbide epitaxial layer disposed on the silicon carbide substrate; and a second silicon carbide epitaxial layer disposed on the first silicon carbide epitaxial layer. When an area density of first particles in the first silicon carbide epitaxial layer is defined as a first area density and an area density of second particles in the second silicon carbide epitaxial layer is defined as a second area density, a value determined by dividing the first area density by the second area density is more than 0.5 and less than 1. The first particles and the second particles each have a maximum diameter of 2 m to 50 m.

Silicon carbide epitaxial substrate and silicon carbide semiconductor device

A silicon carbide epitaxial layer includes a buffer layer in contact with the silicon carbide substrate, a transition layer disposed on the buffer layer, and a drift layer disposed on the transition layer. An area density of the first defect is a first area density, and an area density of the second defect is a second area density, the first area density is 0.03/cm.sup.2 or more, and a value obtained by dividing the second area density by a sum of the first area density and the second area density is less than 2.91%. The first defect, as viewed perpendicularly to the main surface, is shaped to bifurcate from a first origin. No recessed groove is present on an imaginary line segment connecting both ends of the first defect.

Masking layer with post treatment

A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.

Semiconductor Exfoliation Method

A semiconductor substrate comprising a first epitaxial silicon carbide layer and a second silicon carbide epitaxial layer. At least one semiconductor device is formed in or on the second silicon carbide epitaxial layer. The semiconductor substrate is formed overlying a silicon carbide substrate having a surface comprising silicon carbide and carbon. An exfoliation process is used to remove the semiconductor substrate from the silicon carbide substrate. The carbon on the surface of the silicon carbide substrate supports separation. A portion of the silicon carbide substrate on the semiconductor substrate is removed after the exfoliation process. The surface of the silicon carbide substrate is prepared for reuse in subsequent formation of semiconductor substrates.

Method of manufacturing SiC semiconductor device and SiC semiconductor device

An object of the present invention is to provide a high-quality SiC semiconductor device. In order to solve the above problem, the present invention comprises a method for producing a SiC semiconductor device, comprising a growth step of forming a growth layer on a workpiece comprising SiC single crystals, a device formation step of forming at least a portion of a SiC semiconductor device in the growth layer, and a separation step of separating at least a portion of the SiC semiconductor device from the workpiece.

Raised source/drain transistor
12581718 · 2026-03-17 · ·

Transistors with raised source/drain structures and methods of making the transistors are described. A method for making such transistors includes forming a first gate and a second gate on a substrate, forming a p-doped region adjacent the first gate, and forming an n-doped region adjacent the second gate. The method further includes forming a silicon germanium (SiGe) region in a portion of the p-doped region. Subsequently, the method simultaneously forms raised source-drain structures over the SiGe region and on the n-doped region.

Method for producing a freestanding and stress-free epitaxial layer starting from a disposable substrate patterened in etched pillar array
12581872 · 2026-03-17 · ·

The method provides for the growth of an epitaxial layer (200) made of a first semiconductor material on a substrate (100) made of a second semiconductor material; the materials are different and have different CTEs; the method comprises the steps of: A) patterning the substrate (100) by an etching process so to form an array of pillars (110), the pillars (110) being laterally spaced from each other and having a top section (112) larger than a bottom section (114) and/or intermediate sections (116), B) depositing the second semiconductor material on top of the pillars (110) at a growth temperature so to form an epitaxial layer (200) generated by vertical and lateral growth, and C) inducing breaking of the pillars (110) by cooling the substrate (100) and the epitaxial layer (200) below the growth temperature.

SILICON CARBIDE EPITAXIAL SUBSTRATE, METHOD OF MANUFACTURING EPITAXIAL SUBSTRATE, AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
20260082649 · 2026-03-19 · ·

A silicon carbide epitaxial substrate includes a silicon carbide substrate and a silicon carbide epitaxial layer. The silicon carbide epitaxial layer is provided on the silicon carbide substrate. The silicon carbide epitaxial layer has a boundary layer, a buffer layer, and a drift layer. The boundary layer is provided on the silicon carbide substrate. The buffer layer is provided on the boundary layer. The drift layer is provided on the buffer layer. A concentration of an n type impurity in the buffer layer is 310.sup.18/cm.sup.3 or more. A concentration of an n type impurity in the boundary layer is higher than the concentration of the n type impurity in the buffer layer.

METHOD FOR THINNING A COMPOSITE STRUCTURE CARRIED BY A POLYCRYSTALLINE SIC CARRIER SUBSTRATE, WITH REDUCED WARPAGE
20260090307 · 2026-03-26 ·

A method of processing a composite structure including a thin layer of single-crystal silicon carbide disposed on a polycrystalline silicon carbide carrier substrate, includes, after formation of electronic component elements on a front face of the composite structure, grinding a rear face of the composite structure and removing a work-hardened layer present on the surface of the rear face as a result of the grinding process.

SILICON CARBIDE SEMICONDUCTOR DEVICE INCLUDING A BUFFER LAYER AND MANUFACTURING METHOD
20260085446 · 2026-03-26 ·

A silicon carbide (SiC) semiconductor device is proposed. The SiC semiconductor device includes a buffer layer of a first conductivity type and a drift layer of the first conductivity type arranged, along a vertical direction, on the buffer layer. A vertical profile of a doping concentration of the buffer layer includes at least a first valley portion, a first plateau portion and a first transition portion extending from the first valley portion to the first plateau portion. The doping concentration of each of the first valley portion or the first plateau portion varies by less than 20 %. A vertical extent of the first transition portion ranges from 1 % to 30 % of a vertical extent of the first valley portion.