H10P30/2042

Trench junction field effect transistor having a mesa region

A trench junction field effect transistor (trench JFET) includes a mesa region confined by first and second trenches along a first lateral direction. The first and second trenches extend into a semiconductor body from a first surface of the semiconductor body. A mesa channel region of a first conductivity type is confined, along the first lateral direction, by first and second gate regions of a second conductivity type. A first pn junction is defined by the mesa channel region and the first gate region. A second pn junction is defined by the mesa channel region and the second gate region. The mesa channel region includes, along the first lateral direction, first, second and third mesa channel sub-regions having a same extent along the first lateral direction.

GATE TRENCH POWER SEMICONDUCTOR DEVICES HAVING DEEP CHANNEL REGIONS AND RELATED METHODS OF FABRICATING SAME
20260040613 · 2026-02-05 ·

A semiconductor device comprises a semiconductor layer structure that comprises a drift layer having a first conductivity type, a first well region having a second conductivity type, a second well region having the second conductivity type and a JFET region having the first conductivity type, where the JFET region has a doping concentration that is higher than a doping concentration of the drift layer. A gate trench is provided in the semiconductor layer structure. The first well region forms a first sidewall of the gate trench and the second well region forms a second sidewall of the gate trench. Additionally, first and second sidewalls of the JFET region are aligned with respective first and second sidewalls of the gate trench.

POWER DEVICE WITH GRADED CHANNEL

A power device includes a silicon carbide substrate. A gate is provided on a first side of the silicon carbide substrate. A graded channel includes a first region having a first dopant concentration and a second region having a second dopant concentration, the second dopant concentration being greater than the first dopant concentration.

ION IMPLANTATION DEVICE COMPRISING ENERGY FILTER AND ADDITIONAL HEATING ELEMENT
20260066210 · 2026-03-05 · ·

An ion implantation device (20) is provided comprising an energy filter (25) with a structured membrane, wherein the energy filter (25) is heated by absorbed energy from the ion beam, and at least one additional heating element (50a-d, 55a-d, 60, 70) for heating the energy filter (25).

SIC FET WITH PROTON DOPING TO REDUCE INTERFACE DEFECTS

A silicon carbide field-effect transistor is doped with protons to reduce interface defects, and a method of proton doping a silicon carbide field-effect transistor is provided to reduce interface defects. Various FET structures (e.g., source, body, well) may be implanted in a drift region at a first end of a volume of semiconductor material. A drain may be provided (e.g., at a second end of the volume of semiconductor material). In a first example, protons (H+ ions) may be implanted to create a doped region at the first end prior to depositing a dielectric material associated with a gate. The resulting doped interface region underlying the dielectric material exhibits a reduction in trapped charges. In a second example, the dielectric material is deposited prior to proton implantation. The resulting doped interface region exhibits the reduction in trapped charges, and the dielectric material exhibits a reduction in mobile ionic charges.

SEMICONDUCTOR DEVICE INCLUDING SEMICONDUCTOR DEVICE ELEMENTS IN A SEMICONDUCTOR BODY

A semiconductor device includes: a semiconductor body having a first surface and a second surface; a plurality of semiconductor device elements in the semiconductor body at the first surface; a wiring area over the first surface of the semiconductor body; and an impurity in the semiconductor body. A profile of concentration of the impurity has a penetration depth from the second surface into the semiconductor body along a vertical direction. The profile of concentration has a concentration plateau along a vertical segment ranging from 30% to 70% of the penetration depth, the plateau having a fluctuation of the concentration of less than 20%.

Semiconductor device
12581700 · 2026-03-17 · ·

A semiconductor device includes a semiconductor layer made of a wide bandgap semiconductor and including a gate trench; a gate insulating film formed on the gate trench; and a gate electrode embedded in the gate trench to be opposed to the semiconductor layer through the gate insulating film. The semiconductor layer includes a first conductivity type source region; a second conductivity type body region; a first conductivity type drift region; a second conductivity type first breakdown voltage holding region; a source trench passing through the first conductivity type source region and the second conductivity type body region from the front surface and reaching a drain region; and a second conductivity type second breakdown voltage region selectively formed on an edge portion of the source trench where the sidewall and the bottom wall thereof intersect with each other in a parallel region of the source trench.

SEMICONDUCTOR DEVICE
20260082662 · 2026-03-19 · ·

A semiconductor device includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.

Systems and methods for aluminum ion beam generation source technology

An implantation device is disclosed. In particular, an implantation device includes an ionization chamber having a cathode and a repeller arranged therein. A source of aluminum ions is including within the chamber, wherein a displacing gas is introduced to the chamber during an ionization process to yield a beam of energetic aluminum ions.

TRENCH MOSFET WITH PERIODIC P-ISLAND SHIELDING

A semiconductor structure includes a silicon carbide semiconductor substrate of a first conductivity type. The semiconductor structure further includes a drift layer of the first conductivity type located above the semiconductor substrate, a channel layer of a second conductivity type located above the drift layer, and a source region of the first conductivity type located above the channel layer. The second conductivity type is opposite to the first conductivity type. A plurality of trenches penetrates through the source region, the channel layer and a portion of the drift region. A gate electrode is located within each of the plurality of trenches via a gate insulating film and a plurality of shielding structures of the second conductivity type is located around the gate electrode. The plurality of shielding structures covers sidewalls and a bottom of the plurality of trenches. The plurality of shielding structures is arranged in an island-like manner.