H10P14/69398

Ferroelectric or paraelectric based low power multiplier

A low power adder uses a non-linear polar capacitor to retain charge with fewer transistors than traditional CMOS sequential circuits. The non-linear polar capacitor includes ferroelectric material, paraelectric material, or non-linear dielectric. The adder may include minority gates and/or majority gates. Input signals are received by respective terminals of capacitors having non-linear polar material. The other terminals of these capacitors are coupled to a node where the majority function takes place for the inputs.

Perovskite optoelectronic devices and method for manufacturing the same

Provided are a perovskite optoelectronic device containing an exciton buffer layer, and a method for manufacturing the same. The optoelectronic device of the present inventive concept comprises: an exciton buffer layer in which a first electrode, a conductive layer disposed on the first electrode and comprising a conductive material, and a surface buffer layer containing fluorine-based material having lower surface energy than the conductive material are sequentially deposited; a photoactive layer disposed on the exciton buffer layer and containing a perovskite photoactive layer; and a second electrode disposed on the photoactive layer. Accordingly, a perovskite is formed with a combined FCC and BSS crystal structure in a nanoparticle photoactive layer. The present inventive concept can also form a lamellar or layered structure in which an organic plane and an inorganic plane are alternatively deposited; and an exciton can be bound by the inorganic plane, thereby being capable of expressing high color purity.