A semiconductor device includes: an insulated circuit substrate including a base plate, a resin layer on the base plate, and a circuit pattern on the resin layer; a semiconductor chip that is rectangular and is bonded to the circuit pattern such that a side edge of the semiconductor chip is spaced inwardly from an outer peripheral edge of the circuit pattern by a predetermined distance; a case on the resin layer and surrounds the circuit pattern and the semiconductor chip; and a sealing material that covers the insulated circuit substrate and semiconductor chip and is surrounded by the case. The predetermined distance and thickness of the circuit pattern are greater than or equal to 0.1 of a length of one side of the semiconductor chip. A peripheral region of the case and a peripheral region of the resin layer are connected to each other via an adhesive layer.

Various embodiments of the teachings herein include a sintered power electronic module with a first plane and a second plane different from the first plane. An example comprises: a first substrate with a first metallization arranged on the first plane; a second substrate with a second metallization arranged on the second plane; a switchable die having a first power terminal and a second power terminal, the die arranged between the first substrate and the second substrate; and a surface area of all the sintered connections of the first plane is between 90 and 110% of a surface area of all the sintered connections of the second plane. The first power terminal of the die is joined to the first metallization via a sintered connection in the first plane and the second power terminal is joined to the second metallization via a sintered connection in the second plane.

Disclosed are semiconductor packages and their fabricating methods. A semiconductor package includes a first semiconductor die, a second semiconductor die on the first semiconductor die, an underfill layer between the first semiconductor die and the second semiconductor die, and a mold layer on a top surface of the first semiconductor die and a lateral surface of the second semiconductor die. The first semiconductor die includes a first semiconductor substrate and an edge conductive pad on a rear surface of the first semiconductor substrate. One portion of the edge conductive pad overlaps the second semiconductor die. Another portion of the edge conductive pad is covered with the mold layer.

A semiconductor package is provided. The semiconductor package includes a first semiconductor chip including a device region and a dummy region surrounding the device region in a two-dimensional perspective, second semiconductor chips on an upper surface of the device region of the first semiconductor chip, and a molding layer on the first semiconductor chip and covering the second semiconductor chips, wherein each of the second semiconductor chips includes a second semiconductor substrate, a second lower pad on a lower surface of the second semiconductor substrate, and a second upper pad in an upper portion of the second semiconductor substrate, and a volume of the second lower pad is greater than a volume of the second upper pad.

An electronic device includes: an insulating substrate including an obverse surface facing a thickness direction; a wiring portion formed on the substrate obverse surface and made of a conductive material; a lead frame arranged on the substrate obverse surface; a first and a second semiconductor elements electrically connected to the lead frame; and a first control unit electrically connected to the wiring portion to operate the first semiconductor element as a first upper arm and operate the second semiconductor element as a first lower arm. The lead frame includes a first pad portion to which the first semiconductor element is joined and a second pad portion to which the second semiconductor element is joined. The first and second pad portions are spaced apart from the wiring portion and arranged in a first direction with a first separation region sandwiched therebetween, where the first direction is orthogonal to the thickness direction. The first control unit is spaced apart from the lead frame as viewed in the thickness direction, while overlapping with the first separation region as viewed in a second direction orthogonal to the thickness direction and the first direction.

An electronic device has a display substrate including a display area, a driver area, and a fan-out area. The fan-out area has interconnects that provide electrical accesses to display elements on the display area. A driver chip is disposed on the driver area and includes a first edge adjacent to the display area, two side edges connected to the first edge, and a plurality of pad groups. Each pad group includes a row of electronic pads that are electrically coupled to a subset of display elements via a subset of interconnects routed on the fan-out area. The pad groups include a first pad group and a second pad group disposed immediately adjacent to the first pad group. A first subset of interconnects cross one of the two side edges, and extend above a gap between rows of the first and second pad groups to reach the first pad group.

A semiconductor device includes a substrate, a conductive part formed on a front surface of the substrate, a semiconductor chip disposed on the front surface of the substrate, a control unit that controls the semiconductor chip, a sealing resin that covers the semiconductor chip, the control unit and the conductive part, and a first lead bonded to the conductive part and partially exposed from the sealing resin. The conductive part includes a first pad and a second pad disposed apart from each other. The first lead is bonded to the first pad and the second pad.

A semiconductor device is provided, which is configured to improve the adhesion between the resin part and the leads without interfering with proper operation of the semiconductor device. The semiconductor device includes a semiconductor element 1, a first lead 2 including a first pad portion 21, a second lead 3 including a second pad portion 31, a conductor member 61, and a resin part 8. The first pad portion 21 has a first-pad obverse surface 21a including a first smooth region 211 to which an element reverse surface 1b is bonded, and a first rough region 212 spaced apart from the semiconductor element 1 as viewed in z direction and has a higher roughness than the first smooth region 211. The second pad portion 31 has a second-pad obverse surface 31a including a second smooth region 311 to which a second bonding portion 612 is bonded, and a second rough region 312 spaced apart from the second bonding portion 612 as viewed in z direction and has a higher roughness than the second smooth region 311.

An image sensor includes a stack structure including an active pixel region of pixels, and a pad region. The stack structure further includes a first substrate including a photoelectric conversion region and a floating diffusion region, a first semiconductor substrate, a first front structure arranged on a first surface of the first semiconductor substrate, a second substrate attached to the first front structure and including pixel gates, a second semiconductor substrate, and a second front structure, a third substrate attached to the second substrate and including a logic transistor for driving the pixels, and a pad arranged in the pad region. A side surface and a bottom surface of the pad are surrounded by the second front structure, and at least a portion of a top surface of the pad is exposed through a pad opening penetrating the first substrate and extending into the second substrate.

An electronic device includes: a first substrate; an element layer disposed on the first substrate and including an active area and a peripheral area surrounding the active area; a first bonding pad disposed on the peripheral area of the element layer; a second substrate disposed opposite to the first substrate; a second bonding pad disposed on the second substrate and including a first part and a second part surrounding the first part; and a bonding material disposed between the first part of the second bonding pad and the first bonding pad and between the second part of the second bonding pad and the first bonding pad.