A semiconductor package includes a first redistribution layer which includes a first face and a second face that are opposite to each other in a first direction, a first semiconductor chip on the second face, a second semiconductor chip on the second face a first mold film on the second face, and that covers the first semiconductor chip and the second semiconductor chip, and a bridge die disposed on the first face, and that electrically connects the first semiconductor chip and the second semiconductor chip, wherein the bridge die is covered with a second mold film.

In one example, an electronic device comprises a substrate having a first conductive structure, an electronic component coupled to the first conductive structure at a first side of the substrate, wherein the electronic component includes a first side facing the first side of the substrate and a second side opposite the first side, vertical interconnects around the electronic component, wherein the vertical interconnects are coupled to the first conductive structure at the first side of the substrate, an interposer having a second conductive structure coupled to the plurality of vertical interconnects, a thermal body coupled between the electronic component and the interposer, and an encapsulant between the substrate and the interposer, around the thermal body, around the plurality of vertical interconnects, and around the electronic component. Other examples and related methods are also disclosed herein.

A lead frame includes a support portion that has one end on which a first part and a second part that has a smaller thickness than the first part are arranged, a lead, and a heat sink that is welded to the support portion in the second part. A method of manufacturing the lead frame includes forming, from a metal plate, a frame member that includes a support portion and a lead, where the support portion has one end on which a first part and a second part that has a smaller thickness than the first part are arranged, and welding a heat sink to the support portion in the second part.

A semiconductor package assembly comprises a first semiconductor package with a first semiconductor element and a first set of conductive patterns exposed thereon; an interposer mounted thereon via a set of interconnect structures, wherein the interposer has a second set of conductive patterns on its back surface aligned with the first set, electrically connected through the interconnects; and the interposer includes at least one opening extending through it; a second semiconductor package mounted on the front surface of the interposer; and a heat sink, comprising a back heat sink plate mounted thereon between the first package and the interposer, thermally coupled with the first semiconductor element; a front heat sink plate mounted thereon between the interposer and the second package, in contact with the interposer's front surface; and a heat sink plate connector extending through the opening, connecting the plates for heat transfer.

A semiconductor device includes: a heat dissipation base; a case including an outer peripheral wall that has an inner surface facing an inside of the case and a wiring terminal provided integrally with the outer peripheral wall, the wiring terminal having an inner end portion, which is on one end of the wiring terminal and is exposed to the inside of the case from the inner surface of the outer peripheral wall; a sealing member sealing the inside of the case; and an adhesion member embedded in the inner surface of the case and having an adhesion surface exposed from the inner surface, the adhesion member and the heat dissipation base being on different sides of the inner end portion. The adhesion surface has higher adhesion to the sealing member than the outer peripheral wall.

An electronic package is provided. A package module and a semiconductor chip are disposed on a carrier structure, and a laminating member is disposed on the semiconductor chip and the package module. A heat dissipating member is then disposed on the carrier structure and the laminating member. Therefore, by arranging the laminating member, the stress of the carrier structure can be evenly distributed to prevent the problem of delamination from occurring to the semiconductor chip. A manufacturing method of the electronic package is also provided.

A system includes a pattern recognition unit, a pick and place unit and a control unit. The pattern recognition unit determines an actual position of a connection area arranged on or above a substrate of a semiconductor module, the substrate being arranged on a base plate. The pattern recognition unit also determines an actual position of a first end of a terminal element attached to a housing arranged on the base plate, such that the substrate is arranged within a volume defined by the housing. The control unit determines a deviation between the actual position of the first end of the terminal element with respect to the actual position of the connection area. The pick and place unit moves to the actual position of the first end, picks up the first end of the terminal element, and subsequently moves the first end to the actual position of the connection area.

A semiconductor package includes a lower connection structure; an intermediate connection structure on the lower connection structure, the intermediate connection structure defining a mounting space therethrough; a first semiconductor device on the lower connection structure, the first semiconductor device being inside the mounting space; a second semiconductor device on the lower connection structure, the second semiconductor device being inside the mounting space, and the second semiconductor device being apart from the first semiconductor device in a horizontal direction. The first semiconductor device includes a plurality of semiconductor chips stacked in a vertical direction perpendicular to the horizontal direction, and vertical connection conductors extending from lower surfaces of each of the plurality of semiconductor chips in the vertical direction. The plurality of semiconductor chips are sequentially stacked offset from each other along the horizontal direction.

An electronic device includes a package structure, a lead, a heat slug, a semiconductor die, and a bond wire. The package structure has opposite first and second sides, and opposite third and fourth sides spaced along a first direction. The heat slug has a first portion partially exposed outside the second side of the package structure, and a second portion with slots extending inwardly along the first direction and fins between respective pairs of the slots, where the fins are enclosed by the package structure and spaced along an orthogonal second direction. The semiconductor die is attached to the heat slug, and the bond wire has a first end connected to the lead and a second end connected to a circuit of the semiconductor die.

A joined body production method includes subjecting a first electronic component and a second electronic component to thermocompression bonding via a hot-melt adhesive sheet. The hot-melt adhesive sheet includes a binder and solder particles. The binder includes a crystalline polyamide resin having a carboxyl group. A melting point of the solder particles is 30 C. to 0 C. lower than a temperature of the thermocompression bonding. When melt viscosities of the hot-melt adhesive sheet are measured under a condition of a heating rate of 5 C./min., the hot-melt adhesive sheet has a ratio of a melt viscosity at 40 C. lower than the temperature of the thermocompression bonding to a melt viscosity at 20 C. lower than the temperature of the thermocompression bonding of no less than 10.