Patent classifications
H10P14/6309
Methods for oxidizing a silicon hardmask using ion implant
Methods of forming a silicon hardmask are disclosed. In one example, a method may include forming a silicon mask over a device layer, forming a carbon mask over the silicon mask, and forming an opening through the carbon mask. The method may further include forming an oxide layer within the opening by performing an ion implantation process to an upper surface of the silicon mask.
NANOWIRE TRANSISTOR STRUCTURE AND METHOD OF SHAPING
A nanowire device includes one or more nanowire having a first end portion, a second end portion, and a body portion between the first end portion and the second end portion. A first conductive structure is in contact with the first end portion and a second conductive structure is in contact with the second end portion. The body portion of the nanowire has a first cross-sectional shape and the first end portion has a second cross-sectional shape different from the first cross-sectional shape. Integrated circuits including the nanowire device and a method of cleaning a semiconductor structure are also disclosed.
Selective deposition processes on semiconductor substrates
Embodiments of the disclosure relate to methods of selectively depositing polysilicon after forming a flowable polymer film to protect a substrate surface within a feature. A first silicon (Si) layer is deposited by physical vapor deposition (PVD). The flowable polymer film is formed on the first silicon (Si) layer on the bottom. A portion of the first silicon (Si) layer is selectively removed from the top surface and the at least one sidewall. The flowable polymer film is removed. In some embodiments, a second silicon (Si) layer is selectively deposited on the first silicon (Si) layer to fill the feature. In some embodiments, the remaining portion of the first silicon (Si) layer on the bottom is oxidized to form a first silicon oxide (SiOx) layer on the bottom, and a silicon (Si) layer or a second silicon oxide (SiOx) layer is deposited on the first silicon oxide (SiOx) layer.
SUBSTRATE PROCESSING APPARATUS
There is provided a technique that includes a process chamber configured to process a substrate; a substrate-mounting part configured to support the substrate in the process chamber; a gas supply part configured to supply a gas to the process chamber; a high-frequency power supply part configured to supply high-frequency power of a predetermined frequency; a first resonance coil wound to surround the process chamber and configured by a first conductor that forms plasma at the process chamber when the high-frequency power is supplied; a second resonance coil wound to surround the process chamber and configured by a second conductor that forms plasma at the process chamber when the high-frequency power is supplied; and a controller configured to control the high-frequency power supply part so that a period of power supply to the first resonance coil does not overlap with a period of power supply to the second resonance coil.
DC BIAS IN PLASMA PROCESS
Embodiments described herein relate to plasma processes. A plasma process includes generating a plasma containing negatively charged oxygen ions. A substrate is exposed to the plasma. The substrate is disposed on a pedestal while being exposed to the plasma. While exposing the substrate to the plasma, a negative direct current (DC) bias voltage is applied to the pedestal to repel the negatively charged oxygen ions from the substrate.
PROTECTIVE FILM FORMING AGENT FOR SILICON-BASED SUBSTRATE, METHOD FOR PROCESSING SILICON-BASED SUBSTRATE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Provided are a protective film forming agent for a silicon-based substrate, the protective film forming agent containing a silylating agent and a solvent having a Hildebrand SP value of 17.5 or less, a method for processing a silicon-based substrate using the same, and a method for manufacturing a semiconductor device using the same.
Semiconductor device and a method for manufacturing a semiconductor device
A method of creating a vertical semiconductor device, the method includes the steps of performing a LOCal Oxidation of Silicon, LOCOS, process in a vertical trench of a semiconductor material so that oxide material is formed inside the vertical trench, and ledges are formed by the oxide material, inside the vertical trench, as a result of the LOCOS process, so that a lower region of reduced lateral distance is formed between the oxide material, at a base of the trench, depositing the trench with polysilicon and etching the polysilicon downward up to the oxide material using interferometric end point detection, so that polysilicon remains in the lower region.